<dirbaio[m]1> true yea
<firefrommoonligh> That's perf man
<firefrommoonligh> Exactly what I was looking for
<dirbaio[m]1> it seems only duplicated regblocks are timers
<dirbaio[m]1> and usart vs uart on some
<firefrommoonligh> I see the F4 USART 1 and 4 you were talking about
<dirbaio[m]1> I expected more for some reason lol
<firefrommoonligh> Going to make the change now
<dirbaio[m]1> stm32f107 has CAN1, CAN2
<firefrommoonligh> This is going to remove most of the remaining macros from my HAL
<dirbaio[m]1> stm32f373 has DAC1, DAC2
<firefrommoonligh> Good to know
<firefrommoonligh> I cheated and skipped DAC2!
<firefrommoonligh> (Since a lot of variatns don't have it)
<dirbaio[m]1> bingo, stm32f3x4 has SPI1, SPI2
<firefrommoonligh> Good find
<firefrommoonligh> So maybe SPI is not safe to do this with
<firefrommoonligh> Although 3x4 is super niche
<firefrommoonligh> and is missing a lot of shit in general
<firefrommoonligh> I'm going to press with this for SPI at least
<firefrommoonligh> Already use it on I2C and USART
<dirbaio[m]1> the first does a u8 write, the 2nd probably does a u32 write
<dirbaio[m]1> not sure if/why it matters
<firefrommoonligh> So first is faster if you're only writing 8 bits?
<firefrommoonligh> Gotcha; thanks
<firefrommoonligh> Going to leave it in until I understand better
<dirbaio[m]1> maybe the hardware requires u8 writes
<dirbaio[m]1> the RM should tell
<firefrommoonligh> Got the SPI thing set up macroless using Deref
<firefrommoonligh> Thank you for the wisom and thalesfragoso
<thalesfragoso[m]> You don't need your buffer to be aligned, but if it isn't we will corrupt your RAM
<thalesfragoso[m]> Thanks
<thalesfragoso[m]> adamgreig do you know something about the alignment `A8` in stm32-eth ? I thought I saw something about it on the manual, but now I can't find it
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<adamgreig-m> A8?
<adamgreig-m> ah, I see, no, don't know about it
<adamgreig-m> I used u32 buffers in my earlier version
<thalesfragoso[m]> Maybe something related to the beats to get maximum performance ? But that would only make a tiny difference, since it would only affect the first burst
<korken89[m]> Quick question, does anyone know if it if fine to put the same buffer from SPI RX/TX DMA?
<korken89[m]> As we want to send bytes and replace them with the received bytes
<korken89[m]> Feels like there should not be a collision
<disasm[m]> Unless it writes whole words or in bursts
<korken89[m]> I guess that's up to me
<korken89[m]> But normal byte transfers would be my go to
<adamgreig-m> if you have memsize=psize=byte it seems like it should be ok...
<korken89[m]> I'm just thinking about it now, but I'd like to now have 2x the memory buffers
<korken89[m]> I need to try it out...
<firefrommoonligh> Silly question, but with 5V tolerant USART, I can connect an STM32 sensor module to an Arduino, right? ie power it with Arduino 3v3 out. The UART pins are 5V tolerant. So it should just work, right? The STM32 would Tx at 3.3V, which shouuld be enough to read High on arduino (?), and the 5V from arduino TX won't overvolt the STM32 due to it being a 5-v tol pin (per user man)
<firefrommoonligh> I guess I should just try it since I'm sure everything here is 5V tolerant; worst case is it doesn't work due to the levels being wrong
<agg> 3.3v probably isn't enough for the Arduino to read high though the datasheet would say for sure, usually it's something like 0.7*Vcc or 3.5V minimum
<agg> It might work sometimes at room temperature etc etc but ideally you should use a level shifter
<agg> Receiving from the Arduino on a 5V tolerant pin is fine though
<agg> You could also pull the transmit to 5v with a resistor and set the io to open drain and that should work, so long as the pin is also 5v tolerant
<firefrommoonligh> Thank you!
<firefrommoonligh> Going to give it a go, see what happens, and probably recommend users add a level shifter. Most users use Rpi anyway
<firefrommoonligh> Might try that PU and Open drain approach; might need to let user config that or something via a command, which involves a chicken+egg scenario if they can't send the command
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