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<hanetzer>
whelp. just resent the last patch for the asus c201 which didn't get sniped :P
<hanetzer>
ccaione: I'm lookin' you, spi flash pal :P
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<quark_>
jaganteki: I did check the offset from new 1.16 binaries available rockchip github repo. ddr3 data is same as in u-boot dtsi and small differences in lpddr3 data
<quark_>
data offset in 1.16 binaries is 0xCABC and ddr3 data is first. +6048 lpddr3 and +(2*6048) lpddr4