sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<bb-m-labs> build #21 of artiq-pipistrello-nist_qc1 is complete: Failure [failed conda_build] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-pipistrello-nist_qc1/builds/21
<bb-m-labs> build #32 of artiq-kc705-nist_qc1 is complete: Failure [failed conda_build] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc1/builds/32
<bb-m-labs> build #24 of artiq-kc705-nist_qc2 is complete: Exception [build exception] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc2/builds/24
<bb-m-labs> build #58 of artiq is complete: Failure [failed conda_build] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/58
<sb0> whitequark, http://ecee.colorado.edu/~moddel/QEL/ZPE.html (from the kickstarter link you posted...)
<sb0> *indiegogo
<whitequark> it also says something about cold fusion?.. http://ecee.colorado.edu/~moddel/QEL/LENR.html
<sb0> yes
<whitequark> wtf?
<sb0> colorado uni hosted the bullshit "Breakthrough Energy Conference" mentioned in the comments, which is how I found that brilliant professor
<mithro> This is talk from one of my friends on Desktop Fusion https://www.youtube.com/watch?v=G2ijovauYQk
<whitequark> can I have a tl;dl?
<mithro> whitequark: They are building a thing which is kind of similar to a polywell but uses a novel approach to prevent the major losses polywells have
<mithro> whitequark: I think he gets to the meat of the stuff at about 30 minutes
<mithro> whitequark: It was a pretty high level talk for us Fusion noobs
<mithro> they are working on reproducing their theoretical results in reality - the hardest part of all physics :P
<mithro> IIRC even if they are one order of magnitude off they still better than break even
<whitequark> ok, my clever conda proxy hack didn't work, which is not really very surprising
<whitequark> i rolled it back, should be no more failures for that reason
<bb-m-labs> build #59 of artiq is complete: Exception [build exception] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/59
<bb-m-labs> build #22 of artiq-pipistrello-nist_qc1 is complete: Exception [build exception] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-pipistrello-nist_qc1/builds/22
<bb-m-labs> build #33 of artiq-kc705-nist_qc1 is complete: Exception [build exception] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc1/builds/33
<bb-m-labs> build #25 of artiq-kc705-nist_qc2 is complete: Exception [build exception] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc2/builds/25
<whitequark> ... huh. this is the failure we've been seeing on travis
<whitequark> wtf, I have no idea why conda does this.
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<bb-m-labs> build #26 of artiq-kc705-nist_qc2 is complete: Success [build successful] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc2/builds/26
<bb-m-labs> build #60 of artiq is complete: Success [build successful] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/60
<sb0> what was it?
<whitequark> conda-build is stateful crap
<whitequark> conda build --output only works properly if there are leftover files from the previous build
<whitequark> it doesn't clean those when it succeeds, but it DOES clean those when it fails
<sb0> doesn't travis start with a fresh environment every time?
<whitequark> it does
<whitequark> I have no idea why it broke on travis then
<bb-m-labs> build #34 of artiq-kc705-nist_qc1 is complete: Success [build successful] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc1/builds/34
<bb-m-labs> build #23 of artiq-pipistrello-nist_qc1 is complete: Success [build successful] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-pipistrello-nist_qc1/builds/23
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<GitHub60> [artiq] whitequark pushed 1 new commit to master: http://git.io/vEw2q
<GitHub60> artiq/master b931096 whitequark: transforms.artiq_ir_generator: fix While codegen (closes #207).
<whitequark> or conversely, why did it ever work on travis
<whitequark> oh hang on, I know what happened.
<whitequark> conda-build reordered a bunch of crap, and since Travis always pulls the latest version, and it used an equivalent of the code I used on buildbot above which broke, at some point it started always failing
<whitequark> sb0: artiq_coretool is broken
<whitequark> and I don't understand how
<whitequark> ugh, you just removed it
<sb0> artiq_corelog?
<GitHub197> [artiq] sbourdeauducq pushed 2 new commits to master: http://git.io/vEww7
<GitHub197> artiq/master 2b70fa1 Sebastien Bourdeauducq: coredevice/analyzer: update rtio_slack on output messages only
<GitHub197> artiq/master a871194 Sebastien Bourdeauducq: coredevice/analyzer: prefix channel names with their types
<whitequark> %.56 = bitcast void (i8*, %instance.artiq_run_test.X*, i64)* %v.26 to %env.__modinit__*, !dbg !28
<whitequark> 'spot the error'
<GitHub130> [artiq] whitequark pushed 1 new commit to master: http://git.io/vEwoF
<GitHub130> artiq/master 82ec76a whitequark: compiler.types: fix TFunction internal field order (closes #208).
<GitHub122> [artiq] sbourdeauducq pushed 2 new commits to master: http://git.io/vErqg
<GitHub122> artiq/master 1c36ae0 Sebastien Bourdeauducq: coredevice/analyzer: support TTL inputs
<GitHub122> artiq/master 7eb4067 Sebastien Bourdeauducq: test/coredevice/analyzer: test TTL input mode
<GitHub61> [artiq] sbourdeauducq pushed 3 new commits to master: http://git.io/vEr83
<GitHub61> artiq/master 24fa74a Sebastien Bourdeauducq: coredevice/analyzer: support TTL clockgen
<GitHub61> artiq/master 9ba8dfb Sebastien Bourdeauducq: gateware/rtio/core: avoid potential python bug
<GitHub61> artiq/master 532204e Sebastien Bourdeauducq: examples/device_db: add clockgen
<GitHub62> [artiq] sbourdeauducq pushed 3 new commits to master: http://git.io/vErzI
<GitHub62> artiq/master 0807520 Sebastien Bourdeauducq: gateware/rtio: add LogChannel
<GitHub62> artiq/master ba6c527 Sebastien Bourdeauducq: gateware/targets: add RTIO log channels
<GitHub62> artiq/master 50a463a Sebastien Bourdeauducq: runtime: support for RTIO logging
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<sb0> people have been sending me this thing a few times already. let me download the original paper...
* sb0 is somewhat blasé with academic PR
<whitequark> yeah, I wonder where a CPU-focused team found a decent photonic I/O peripheral
<sb0> it's also interesting that a open source-focused team would publish in fucking Nature
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<sb0> "Code availability. The source code for the processor is available at http://bar.eecs.berkeley.edu/projects.html"
<sb0> is there anything else than the riscv hdl and the test applications there?
<cr1901_modern> It doesn't mention anything about who provided the photonic peripheral. Just the software front end that was used to incorporate it into the design.
<cr1901_modern> Unless I'm misunderstand what "photonic peripheral" means (analogous to a cell in a standard cell library?)
<whitequark> see page 2
<cr1901_modern> Ahhh, thanks
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<GitHub114> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/vErAZ
<GitHub114> artiq/master 048dcbe Sebastien Bourdeauducq: runtime/rtio: reverse char ordering in log messages
<GitHub131> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/vEovB
<GitHub131> artiq/master b5253e1 Sebastien Bourdeauducq: coredevice/analyzer: decode log messages
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