00:00 <lsneff> Is there any way to change the default sync clock domain of a submodule?

00:01 <tpw_rules> DomainRenamer i believe

00:02 <tpw_rules> like m.submodules.cool = DomainRenamer("cool")(MyCoolModule()) will change the sync domain of MyCoolModule to cool

00:03 <tpw_rules> to the clock domain cool specifically

00:03 <tpw_rules> i imagine you can use it to change non-default domains too but i don't know the syntax

00:03 <lsneff> Awesome, thank you

00:29 <_whitenotifier-f> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/JT9lT

00:29 <_whitenotifier-f> [YoWASP/yosys] whitequark d6b89cb - Update dependencies.

01:57 <lsneff> When simulating, how can I set a signal of the module to a specific value before starting?

02:02 <lsneff> Figured it out, nvm :)

03:46 <whitequark> for non-default domains, DomainRenamer({"foo": "bar"}) renames "foo" to "bar"

04:18 <lsneff> I installed matplotlib and suddenly I can't simulate anything because the vcd module is completely empty and therefore VCDWriter can't be imported from it.

04:23 <whitequark> that's weird

04:28 <lsneff> indeed

04:32 <lsneff> nvm, I'm just an idiot and had a file called vcd.py in my current directory

04:34 <cr1901_modern> Yes, been there and done that :). 1/10 would not recommend.

05:04 <lsneff> What's the difference nmigen/nmigen and m-labs/nmigen?

05:07 <d1b2> <edbordin> nmigen/nmigen is the actively maintained one

05:10 <d1b2> <edbordin> maybe I am oversimplifying by putting it that way... nmigen/nmigen is the version we're talking about in this channel and the one actively maintained by whitequark, who created it in the first place

05:11 <whitequark> that's essentially correct

05:16 <d1b2> <edbordin> annoyingly google still ranks the old one higher in my results...

05:20 <lsneff> Ah, that clears it up, thanks

05:21 <lsneff> Another question, someone mentioned earlier that Instance can be used to instantiate arbitrary verilog. How can instantiate a verilog module from a file, instead of just built-ins?

05:21 <whitequark> if you're using nmigen.build (e.g. a board from nmigen-boards), use platform.add_file

05:26 <lsneff> I suppose there's no chance of simulation working with that?

05:27 <whitequark> cxxsim would be able to work with that, but it's not merged yet

05:27 <whitequark> pysim (the one you're using) would not

19:43 <_whitenotifier-f> [yowasp.github.io] RobertBaruch opened issue #1: Pip made me scared. Is wasmtime 0.20.0 incompatible? - https://git.io/JTHia

19:45 <_whitenotifier-f> [yowasp.github.io] RobertBaruch opened issue #2: What solvers come with yowasp? - https://git.io/JTHiD