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<d1b2>
<OmniTechnoMancer> If it is a ring oscillator then those are temperature dependent aren't they?
<agg>
the datasheets aren't really clear what sort of oscillator it is, i'd have thought it might be RC rather than a ring oscillator since it's a hard IP block
<agg>
but the datasheet also suggests it should be 100MHz
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<d1b2>
<OmniTechnoMancer> Aren't RC just ring with an RC to entrain it?
<d1b2>
<OmniTechnoMancer> I do not know much about how such low level things occur on actual silicon
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<lsneff>
Aha! I'm able to communicate with my tinyfpga bx through the webserial api!
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<_whitenotifier-f>
[nmigen] whitequark commented on issue #525: [RFC] Add InstanceResource to use Instance I/O as Platform I/O - https://git.io/JTNWE
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<zignig>
lsneff: nice work !
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<whitequark>
re de0-nano-soc: that's different from de0-nano, right?
<whitequark>
(Terasic is so confusing...)
<zignig>
whitequark: thanks for making the nmigen* code , it has opened some interesting doors. ;)
<lkcl>
zignig: if i may, and you're in a position to do so (or know someone who can) perhaps you would consider supporting whitequark, via patreon? https://www.patreon.com/whitequark
<trabucayre>
whitequark: de0-nano is CycloneIV, de0-nano-soc is CycloneV + ARM cortex A9
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<whitequark>
agg: OmniTechnoMancer: i believe ring oscillators on practical silicon are temperature compensated
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