<alyssa>
And even ancient GL_CLAMP and GL_MIRROR_CLAMP
<alyssa>
That was a fun find.
<HdkR>
I saw recently that the bitfield was large enough for that
<alyssa>
HdkR: Yeah, but I can't believe it's actually there.
<HdkR>
very neat
<alyssa>
Are those in DirectX somewhere?
<alyssa>
D3D i guess has `MirrorOnce` which would correspond to GL_MIRROR_CLAMP_TO_EDGE
<alyssa>
So maybe it was just a precautionary thing
<HdkR>
I don't know D3D to know
* alyssa
shrug
<alyssa>
We have GL_QUADS and GL_POLYGON so who knows!
<alyssa>
works out just fine for us implementing desktop GL on the hardware.
<HdkR>
Sounds like the hardware teams and the software teams aren't quite thinking about the same picture :P
<alyssa>
:D
<alyssa>
Anyway, back to MRT
<alyssa>
That was a good warmup anyhow
<alyssa>
But first integer framebuffers
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<anarsoul>
alyssa: how do you make sure that attributes are aligned on midgard? looks like you also need aligned addresses in attributes descriptors
<anarsoul>
(aligned to 64-byte boundary)
<alyssa>
anarsoul: ugh.
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<alyssa>
`panfrost_stage_attributes`
<alyssa>
It's not pretty.
<anarsoul>
yeah, I'm trying to understand how it's supposed to work :)
<anarsoul>
thanks
<alyssa>
Probably we could fix Gallium to 64-byte align vertex buffers and add a CAP for it ... you probably don't want to actually implement that hack.
<anarsoul>
yeah, that'd be nice
<alyssa>
But conceptually, GLES lets you add a src offset for a particular vertex
<alyssa>
So we abuse that to add on the unaligned portion, so the hardware thinks it has an aligned buffer
<alyssa>
Probably bad for perf in addition to being a big hack justified by some algebra
<anarsoul>
any pointers on where to hack gallium to align vertex buffers?
<alyssa>
Hmm, well,
<alyssa>
There are really two cases I guess
<alyssa>
1) BOs we allocate. Check the usage in lima_resource_create and if it could be used as an attribute, tell the kernel to align it. Or, if your kernel doesn't know how to do that, allocate an extra 64 bytes and do a mask off hack (but probably if you just allocate a multiple of 4k or whatever, it'll force alignment)
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<alyssa>
2) User vertex buffers. I think you can just refuse to handle these and they'll get lowered if you disable the CAP.
<alyssa>
Although, wait
<alyssa>
you still need to ensure buf->buffer_offset is aligned somehow..