clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<tpb> Title: wb2axip/demoaxi.sby at master · ZipCPU/wb2axip · GitHub (at github.com)
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<pepijndevos> daveshah, I asked about fuser in #archlinux and it seems this is normal, so I made a PR that just sends it to dev/null
<tpb> Title: Redirect fuser stderr to /dev/null by pepijndevos · Pull Request #1529 · YosysHQ/yosys · GitHub (at github.com)
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<janrinze> return code 134 with yosys-abc, any idea what that means?
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<daveshah> janrinze: no, are there any other errors printed?
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<janrinze> yes, it's an assert. found the same now in a yosys bug report. Also it was an error on my side.
<janrinze> On a side note, abc9 is a lot faster than abc?
<ZirconiumX> janrinze: ABC9 works based on delay, while ABC uses unit delay
<ZirconiumX> So it can perform delay-aware LUT mapping
<ZirconiumX> Which generally results in higher Fmax
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<janrinze> ZirconiumX: Sounds like a very nice improvement.
<ZirconiumX> For example, a LUT6 does not have the same delay as a LUT2 :P
<ZirconiumX> Which was what ABC1 assumed.
<daveshah> FWIW, I think hypothetically ABC1 could use a LUT library with delays too
<ZirconiumX> Long-term, I think whitequark wants to replace ABC[9] with the flowmap pass, but that's not yet ready for production
<daveshah> It's more that the Yosys command didn't support it
<daveshah> The real benefit from abc9 itself is handling of delays through white/greyboxes like carries
<daveshah> Unfortunately it's ability to optimise around carry chains still leaves something to be desired
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