<azonenberg>
500 MHz differential probe is now out at fab
<azonenberg>
This is probably going to be my last PCB design for a while since I have the lab move coming up
<azonenberg>
Hoping i can get this one done, plus assemble the greenpak breakouts i did over the summer
<azonenberg>
before things get nuts
theMagnumOrange has quit [Ping timeout: 258 seconds]
stoopkid_ has joined ##openfpga
GenTooMan has quit [Quit: Leaving]
theMagnumOrange has joined ##openfpga
Bike has quit [Quit: Lost terminal]
stoopkid_ is now known as stoopkid
discrttm has quit [Ping timeout: 240 seconds]
<azonenberg>
whitequark: ping
<azonenberg>
Thinking of using solvespace for a 2D building floorplan application
<azonenberg>
a) does it sound like a good choice for that, b) any good getting-started resources?
<whitequark>
azonenberg: a) sure, sounds quite excellent
<whitequark>
we even added a feature for measuring areas of closed loops recently
<azonenberg>
Me and the wife are buying a house soon, and we've found exterior dimensions of the building in public records but not full interior floorplans
<azonenberg>
i'm going there with a building inspector tuesday to see how horrible the construction is, and take measurements
<azonenberg>
assuming we decide to buy this house i'll want to turn those sketches into full floorplans i can use for figuring out furniture layout etc
<azonenberg>
As well as in building permit applications for my various electrical etc improvements
<rqou>
btw mechanical loop-to-area converters are really really neat
<rqou>
they're called planimeters
<whitequark>
yup
<whitequark>
azonenberg: as for getting started, the tutorial on the website works
<azonenberg>
whitequark: so, first off i can't build it
<azonenberg>
i just tried to install cmake and it's saying i dont have the package installed
<azonenberg>
i may have done an old source build years ago?
* azonenberg
investigates
<azonenberg>
yeah
<azonenberg>
i have 3.1.2 from source installed i think
<whitequark>
version check fixed in 13695be
<whitequark>
you need 3.2 or later
<whitequark>
I haven't realized it took cmake 3 major versions to add continue() lol
<azonenberg>
lol
<azonenberg>
ok, so i need to fix my cmake install (in progress, my debian mirror is being slow today)
<azonenberg>
i guess this is progress though, i've found a bug in solvespace and i havent even got it to compile :P
<azonenberg>
whitequark: question, why have zlib, cairo, and libpng as submodules instead of using distro packages?
<azonenberg>
do you really need super current versions?
<azonenberg>
/nfs4/home/azonenberg/code/3rdparty/solvespace/src/draw.cpp: In member function ‘SolveSpace::GraphicsWindow::Selection SolveSpace::GraphicsWindow::ChooseFromHoverToSelect()’:
<azonenberg>
/nfs4/home/azonenberg/code/3rdparty/solvespace/src/draw.cpp:346:54: warning: ‘bestZIndex’ may be used uninitialized in this function [-Wmaybe-uninitialized]
<azonenberg>
also, you don't have warning-free code :p
[X-Scale] has joined ##openfpga
Lord_Nightmare has quit [Ping timeout: 248 seconds]
Lord_Nightmare has joined ##openfpga
X-Scale has quit [Ping timeout: 248 seconds]
[X-Scale] is now known as X-Scale
pie_ has quit [Remote host closed the connection]
pie_ has joined ##openfpga
Lord_Nightmare2 has joined ##openfpga
Lord_Nightmare has quit [*.net *.split]
seu has quit [*.net *.split]
hobbes- has quit [*.net *.split]
Ellied has quit [*.net *.split]
fouric has quit [*.net *.split]
jn__ has quit [*.net *.split]
Lord_Nightmare2 is now known as Lord_Nightmare
teepee has quit [Ping timeout: 258 seconds]
nrossi has joined ##openfpga
teepee has joined ##openfpga
pie_ has quit [Ping timeout: 240 seconds]
nmz787 has quit [Changing host]
nmz787 has joined ##openfpga
pie_ has joined ##openfpga
fouric has joined ##openfpga
Ellied has joined ##openfpga
hobbes- has joined ##openfpga
seu has joined ##openfpga
jn__ has joined ##openfpga
qu1j0t3 has quit [*.net *.split]
bibor has quit [*.net *.split]
nurelin has quit [*.net *.split]
nurelin has joined ##openfpga
bibor has joined ##openfpga
qu1j0t3 has joined ##openfpga
pointfree1 has quit [Ping timeout: 255 seconds]
balrog has quit [Ping timeout: 260 seconds]
balrog has joined ##openfpga
Hootch has joined ##openfpga
pie_ has quit [Ping timeout: 240 seconds]
teepee has quit [Ping timeout: 248 seconds]
teepee has joined ##openfpga
<rqou>
why is everyone suddenly interested in P1735 being pwned?
<rqou>
it's EEs designing crypto, what did you expect?
stoopkid has quit [Quit: Connection closed for inactivity]
<rqou>
they've already caught up to recommending aes-cbc+rsa2048+sha-2, that's already beyond what i ever expected
<rqou>
be glad it's not vhdl's native encryption support, which only mandates des (not 3des)
<rqou>
and still has an "optional" recommendation for serpent/cast/elgamal/md2/others
<rqou>
anyways, it's IEEE not "infosec"; they'll probably catch up to using aes-gcm and/or chacha20-poly1305 (or other future AEAD constructions) around 2025 or so
teepee has quit [Ping timeout: 252 seconds]
pointfree1 has joined ##openfpga
teepee has joined ##openfpga
pie_ has joined ##openfpga
<izabera>
why do people keep coming up with new homemade crypto?
<rqou>
what would you use instead?
<rqou>
pgp envelopes?
<rqou>
i guess that would actually have helped in this case
<rqou>
but not too much
<rqou>
apparently some researchers found a classic cbc padding oracle attack
<rqou>
yawn
<rqou>
also, you do realize that in the end this is just a piece of DRM, right?
<rqou>
aka "inherently broken"
<rqou>
cr1901_modern: why are you not sleeping? :P
pointfree1 has quit [Read error: Connection reset by peer]
<whitequark>
azonenberg: re zlib as submodule: this is for Windows builds
<whitequark>
azonenberg: re warnings: I do.
<whitequark>
just not with the compiler you use.
<whitequark>
also, 80% of that code isn't mine.
pointfree1 has joined ##openfpga
<rqou>
argh what kind of insane people actually use standard deviation? :P
<rqou>
(as opposed to just variance)
<rqou>
doing AI/ML has corrupted me :P
<rqou>
"wait, 'normal people' don't use log probabilities?"
qu1j0t3 has quit [Ping timeout: 246 seconds]
teepee has quit [Ping timeout: 240 seconds]
teepee has joined ##openfpga
<rqou>
whoops, just accidentally declared tab bankruptcy by alt-f4-ing the wrong window
<pie_>
awygle, what do you think about software instead of hardware error correction? it doesnt sound very appealing to me but hardware redundancy sounds rather expensive...hm, then again implementing it in software doesnt decrease exec time or power usage overall
<awygle>
SW ECC absolutely used, especially for comm links obviously but sometimes other places. Couple things - it does make things slower and take more power, and keep in mind that you may take a bit flip in an arbitrary location so be real careful. You need some level of hardware protection in case that location is e.g. the program counter or stack pointer.
<awygle>
Defense-in-depth is needed
<awygle>
I gave up on that last website after it tried to load for three minutes. How many MB of JS does the thing load?
<pie_>
awygle, re: bit flips, exactly
<pie_>
awygle, ive no idea it took a reload for me then worked
m_t has joined ##openfpga
<awygle>
pie_: something I forgot yesterday is BJTs and FETs behave very differently under TID
<awygle>
BJTs tend to just lose beta slowly over time, FETs tend to get stuck at some state
<shapr>
what's TID?
<shapr>
time independent something?
<pie_>
im guessing some kind of wear
<shapr>
bipolar junction transistor and field effect transistor is BJT and FET
<shapr>
awygle: total ionizing dose?
<pie_>
ah
<pie_>
yeah that should be it shapr
<shapr>
ah, that matches context
<pie_>
figured itd be somehtign radiation related :P
<pie_>
shapr, spaaaaace
<shapr>
radiation safety was my first college major, I learned much
<pie_>
oh cool
<pie_>
is that sarcasm? :P
<shapr>
no, completely serious
<pie_>
ah ok
<pie_>
\o/
<shapr>
I learned about ionizing radiation, isotope decay chains, all sorts of neat things.
<shapr>
I was almost done when I found out the first two years of that kind of job are the most boring scut work you can imagine
<shapr>
so I jumped to another major.
<pie_>
i think my material science teacher worked as a ?chief? engineer at the "local" nuclear plant >_>
<pie_>
shapr, ah.
<shapr>
but I was in the very first year of the Oak Ridge Associated Universities college program
<pie_>
lots of interesting people in here
<pie_>
well, gotta go to class, im gonna fall asleep :/
<pie_>
i like the class but ive been sleepy all day x3
<shapr>
which class?
<shapr>
anyway, have fun
<pie_>
uh, intro to mathematical logic and set theory or something like that
<awygle>
Yes, TID is total ionizing dose, contrasted with SEE, which are single event effects
pie_ has quit [Ping timeout: 260 seconds]
digshadow has quit [Ping timeout: 258 seconds]
pie_ has joined ##openfpga
pie_ has quit [Ping timeout: 260 seconds]
digshadow has joined ##openfpga
cr1901_modern has quit [Read error: Connection reset by peer]
cr1901_modern has joined ##openfpga
digshadow has quit [Ping timeout: 260 seconds]
<awygle>
Finally got that microcontroller post to load. Holy wow. Lot of words.
juri_ has quit [Ping timeout: 252 seconds]
<rqou>
whitequark: can you make the MTVRE meetup on Wednesday evening?
juri_ has joined ##openfpga
lexano has quit [Ping timeout: 258 seconds]
m_w has quit [Quit: leaving]
m_w has joined ##openfpga
lexano has joined ##openfpga
pie_ has joined ##openfpga
pointfree1 has quit [Ping timeout: 264 seconds]
pie_ has quit [Ping timeout: 248 seconds]
nrossi has quit [Quit: Connection closed for inactivity]
Hootch has quit [Read error: Connection reset by peer]
m_t has quit [Quit: Leaving]
bb has joined ##openfpga
_whitelogger has joined ##openfpga
pointfree1 has joined ##openfpga
digshadow has joined ##openfpga
m_w has quit [Quit: Leaving]
gnufan has quit [Quit: Leaving.]
pointfree1 has quit [Read error: Connection reset by peer]
pointfree1 has joined ##openfpga
pointfree1 has quit [Remote host closed the connection]
Xark has quit [Ping timeout: 260 seconds]
Xark has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 260 seconds]