marcan changed the topic of #asahi-re to: Asahi Linux: porting Linux to Apple Silicon macs | Hardware / boot process / firmware interface reverse engineering | WARNING: this channel (only) may contain binary reverse engineering discussion | RE policy: https://alx.sh/re (MANDATORY READ) | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-re
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<bgb_> are the register bit definitions of https://github.com/AsahiLinux/docs/wiki/HW:ARM-System-Registers extracted from xnu kernel ?
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<Shiz> sven: damn it, someone wrote a usable devtree parser around the same time i did then :p
<Shiz> sad i didn't notice it
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<modwizcode> the names come from xnu headers iirc plus some I think were named after discovery of their uses but mostly from xnu I think
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<marcan> fun things to do: exhaustive probe of instruction set
<j`ey> marcan: heh, mark got you wondering? :P
<marcan> yeah, AMX is off as one would expect (AFAICT), but... there are other things in here
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<never_released> marcan: yeah, tons
<never_released> and if you do the probing from EL2 or EL1
<never_released> you might get yourself into GL1 or GL2
<never_released> in which case here be dragons
<modwizcode> I'm very very interested in GL1/2
<marcan> well, I just found the freaking memory compression instruction
<modwizcode> Really?
<modwizcode> that was quick
<modwizcode> I figured those would be the most confusing and hard to find
<marcan> it's literally the first thing that had an obvious effect (faulting), numerically, in the range
<marcan> the previous subset all does "nothing" as far as I can tell, but does not fault; no idea what it is
<marcan> (could just be some hint space Apple made for themselves, or PAC related or something)
<modwizcode> Adding support for ISA extensions in qemu is going to be fun, but I don't think there's a sane framework for doing so. Which makes sort of sense, ARM was originally completely against custom vendor ISA extensions iirc.
<davidrysk[m]> marcan: how about the memory decompression instruction? :p
<modwizcode> I suppose determining what type of params an opcode uses can be a lot easier if you have detailed fault reporting to use
<modwizcode> I wonder what the translate address instruction is used for
<marcan> the thing is ARM *already has* instructions for translate address
<marcan> and the output format is the same even
<modwizcode> right which is what I'm confused about
<marcan> but the ARM instructions return via sysreg, the apple one returns via GPR
<modwizcode> I mean ARM also has PAC and Apple does their own thing (although apple ones make sense)
<modwizcode> Apple one might be predictable?
<modwizcode> not sure if you'd want to predict that kind of instruction though
<maximus64> marcan: did you try to scan for instructions on the firestorm core? wondering if there any differences there. Unlikely but possible
<marcan> I did not, and I sure hope there aren't
<marcan> that would be madness
<j`ey> that would be bad for scheduling!
<maximus64> yea haha
<marcan> I can try later anyway
<marcan> (it's adding one line of code at the top of my python script...)
<marcan> (has anyone with a serial cable *not* tried m1n1's python stuff? because you're totally missing out)
<maximus64> did you push the change? I can try it on my setup :)
<marcan> I pushed a minor framework change
<marcan> the script is just stuff like https://mrcn.st/p/sBwViUh5 and manually poking around
<marcan> to run it on other CPUs, you call p.smp_start_secondaries() first and then just copy/hack the instr() thing in util.py to use proxy.smp_call_sync() instead of proxy.call()
<marcan> *inst()
<marcan> feel free to extend it with a cpu= argument where 0 is call() and others go through smp_call_sync or so
<maximus64> oh nice. I was hack up mini to start on other cores before. Didn't know that there are framework for that already
<marcan> do note that the other cores have the MMU off
<marcan> the page compress/uncompress instructions and translate instruction might not like that
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<never_released> Some extensions have to explicitly be enabled
<never_released> through ACTLR or other registers
<never_released> marcan: is the Apple one accessible from user mode
<modwizcode> Are the compression instructions accessible in user mode?
<never_released> Will have to test
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<modwizcode> That seems odd. It doesn't really sound like something that would require a chip to support
<modwizcode> In general those sound a lot like some of the safety that clang has maybe augmented a bit.
<roxfan> they say iOS 14, not A14 or whatever so it sounds mostly software
<roxfan> ah wait they do
<roxfan> might be PAC then
<roxfan> although that was added in A12, not A13
<davidrysk[m]> I think A13 has improved PAC?
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<roxfan> could be, I don't follow it closely
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