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<
CaptHindsight>
anyone working on RT kernels for the A20?
<
CaptHindsight>
we are seeing ~80uS max IRQ latency jitter using preemept_rt
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<
CaptHindsight>
anyone working on RT kernels for the A20? (cubie2)
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<
asterick>
Crazy good book on the low-level design of the zx spectru,
* mnemoc
missed a book how to design extension boards
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<
CaptHindsight>
we have a xilinx fpga board for the cubie2
<
CaptHindsight>
you could turn it into lots of different peripherals
<
asterick>
CaptHindsight: that a standard board?
<
asterick>
(that said, I would probably rather just get a SoCKit board.)
<
CaptHindsight>
it might become one, or we might just spin an a20 with an fpga
<
asterick>
(no 3d acceleration then though)
<
CaptHindsight>
working on the RT kernels now, then a driver, then we'll see
<
CaptHindsight>
connects over SPI and a few lines of GPIO
<
CaptHindsight>
a kitchen sink stepper board might be a nice design to float around China
<
CaptHindsight>
ARM soc with hardware stepping plus some drivers for ~$60
<
CaptHindsight>
asterick: yeah, the lack of gpu leaves out having a nice HD local User Interface
<
CaptHindsight>
been working with zedboards as well
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<
CaptHindsight>
I wish there was an fpga with hard ARM cores and a hard GPU
<
CaptHindsight>
maybe someday
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<
asterick>
CaptHindsight: I think the main problem is licencing.
<
asterick>
GPUs are expensive and usually a black box.
<
asterick>
It's also a huge section of the total die size. on most cellphone chipsets the GPU is like 60~80% of the total silicon.
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<
CaptHindsight>
yeah, depends on the SOC, xilinx came late to market anyway with Zynq
<
CaptHindsight>
I don't even know if they will break even on the whole project
<
CaptHindsight>
but a $6 allwinner soc + $10 fpga works for me
<
CaptHindsight>
cpu + gpu + plenty of gates for IO and peripherals, I'm surprised that there isn't a cheap board in China with it all yet
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