<projectgus>
mine still idles a bit high (it's never 0.0) but i've just lived with it
<projectgus>
(more details in comment)
<Tenkawa>
think I'm going to compile out the vpu and a few other things too
<Tenkawa>
mine is headless
<Tenkawa>
so none of its needed anyway
<projectgus>
nod
<Tenkawa>
still a neat little device though all things considered
<Tenkawa>
I was just happy to finally see something newer than 3.0 run on it
<projectgus>
yeah that is pretty good, I should look into updating
<projectgus>
I have a spare one around I can play with a bit (this one runs my email and other things so experimental kernel updates aren't really something I'm keen on)
<Tenkawa>
both my i.mx6's run 3.10.* now
<projectgus>
do you know if the CAAS(sp?) hardware encryption has had any improvement?
<Tenkawa>
oh caam
<projectgus>
it was pretty broken in 3.0.35, I could kind of see where it was broken but I never tried to fix it
<Tenkawa>
not sure.. I moduled it though because I dont need it
<projectgus>
my gk802 runs an encrypted disk so it'd be quite nice to know that could be used
<projectgus>
actually it runs an encrypted RAID1 array over the two SD card slots :P
<Tenkawa>
ahhh
<Tenkawa>
nice
<Tenkawa>
pm/suspend/resume cause me grief in the kernel code
<projectgus>
yeah that sounds like the kind of thing noone tests on platforms like gk802
<Tenkawa>
indeed
<Tenkawa>
however its very hard to remove without breaking the whole kernek
<Tenkawa>
er kernel
<Tenkawa>
(compiling that is)
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<chrisw987>
I want to output 27M on clko2, so I need to pick a different parent than osc_clk, right?
<chrisw987>
I'm having trouble deciding on which one to use.
<chrisw987>
I see pll3_pfd_540M is a nice multiple of the 27M I need.
<jnettlet>
chrisw987, which kernel are you using? With the fsl kernels there is a fixed clock video_27m that uses pll3_pfd_540m as its parent
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<chrisw987>
jnettlet: The kernel is from a toradex recipe. I'm not sure of it's origin beyond that. Here are how my clocks are being used now:
<chrisw987>
I think I see how to get there, by connecting usdhc4_clk to pll3_pfd_540m, then set clko2 to select usdhc4_clk. Not sure how to divide it down correctly though.