12:07 <prahal> do max77686 selb<x> pins at high means "no dvfs" ?

12:10 <prahal> I am unable to set vdd_arm/vdd_int to safe voltages on emergency_restart

12:31 <krzk> prahal: for PMIC high SELB means use DVS. Low means no DVS. But of course how it is from AP point of view it depends on the board layout (levels might be inverted).

14:30 <prahal> odroid u2 have selb tied to vdd_io .

14:32 <prahal> though I exported the gpio that controls dvs1,2 and 3 in u-boot . when I do_reset, it always use dvs1 value

14:34 <prahal> krzk: my test is to set buck2dvs1 to 0x1c (0.95V) and reset. bootloader cannot start with this low voltage

14:36 <prahal> even if I tweak dvs<n> gpio lines it cannot reset (buck2dvs<2,3,4,5,6,7,8> are all 0x28 ie 1.1V (from u-boot pmic dump)

14:42 <prahal> someone told selb latch the dvs values ... does it means it has to go both high and low for to apply dvs gpio changes < http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/271248.html and https://lists.denx.de/pipermail/u-boot/2015-August/221741.html

14:44 <prahal> thougth the former tell selb is active low and the latter active high

15:07 <prahal> dvs_b2 must be off then ... let s try all position this bit could lay on in buck2ctrl1 :/

15:27 <prahal> tried the all to no avail