ChanServ changed the topic of #linux-sunxi to: Allwinner/sunxi development discussion - Don't ask to ask. Just ask! - See http://linux-sunxi.org | https://github.com/linux-sunxi/ | Logs at http://irclog.whitequark.org/linux-sunxi
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<Turl> ssvb: nice :)
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<calris_> Why doesn't git clone git://github.com/linux-sunxi/u-boot-sunxi.git bring in all the branches?
<calris_> I only get sunxi, no sunxi-current or lichee-dev :(
<ssvb> calris_: that's how git works, you can get the list of remote branches and tags with 'git ls-remote' and checkout the needed branch
<calris_> git checkout -b sunxi-current origin/sunxi-current should do the trick I imagine?
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<calris_> Hmmm, running Eclipse on an A10 is painfully slow - any ideas on a lightweight IDE (please don't say vi - I'm a big fan, but need a few more features)
<ssvb> calris: you could probably try http://www.geany.org/
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<wingrime> oliv3r: maybe I can find dram ic datascheet
<wingrime> to see max freq
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<wingrime> hramrach: stop resending my patches
<hramrach> wingrime: I did not get the patch you said you sent a week ago
<hramrach> I would totally not bother making a new one if there was one already
<hramrach> as for the others you sent broken patches and did not bother to resend working ones
<hramrach> so I don't see waht yo uare complaining about
<wingrime> [PATCH] sunxi:pm: unify sun4i and sun5i pm
<wingrime> look carefully
<wingrime> hramrach: as 3.0 and 3.4 different it can looks like broken
<hramrach> wingrime: I don't see that one
<hramrach> 3.0 and 3.4 only differ in whatespace in pm
<wingrime> hramrach: you patches 1,3 looks good
<wingrime> 2 - too early
<wingrime> you can't simply exit form this suspend
<wingrime> only no_suspend_console helps
<hramrach> that's 3
<hramrach> yes, it's noted in the patch message
<wingrime> sorry
<wingrime> hramrach: better, if you implement my idea
<wingrime> hramrach: wite asm code that suspend dram do WFI and resume ram
<wingrime> hramrach: and make liker place it to SRAM
<wingrime> hramrach: kernel can this
<hramrach> I have no idea how to make linker do that
<wingrime> hramrach: that make possible for you remove suspend.bin
<hramrach> but perhaps the standby code to enable interrupts to wake up could be used in standby too
<wingrime> hramrach: static void __tcmfunc hello_tcm(void)
<wingrime> ITCM
<wingrime> that make function placed in SRAM
<wingrime> but all vars/stack also must be there
<oliv3r> wingrime: A1x doesn't go 'all the way' and on top of that, if the DDR routing on the PCB is done poorly, it won't reach the A1x's max. You are always free to experiment and find the highest stable setting for your board of course :)
<oliv3r> i wonder what a reliable memory benchmark is that notices corruptions
<hramrach> something like memtest that loads from bootloader directly
<wingrime> hramrach: #define __tcmfunc __attribute__((long_call)) __section(.tcm.text) noinline
<hramrach> but I suspect memtest has lots of assembly and cannot be ported to different architecture easily
<wingrime> hramrach: SO do your best
<oliv3r> hramrach: wingrime googlegroups sometimes drops patches or e-mails; highly annoying
<oliv3r> oh, memtest, of course! that should find instabilities
<wingrime> hramrach: rewrite in asm dram suspend/release with WFI in a middle
<oliv3r> lets see if there's an arm memtest
<wingrime> hramrach: other work can be write simply done in pm.c
<wingrime> hramrach: subscrible at all)))
<hramrach> oliv3r: also disk reads/writes that use dma
<hramrach> wingrime: standby.bin works and I think copying ti into sram just before suspend is more reliable
<wingrime> hramrach: we can use uboot apps for test
<wingrime> hramrach: we can simply add functions for mem testing as uboot functions
<hramrach> if something happens to write into sram the standby.bin is reloaded before suspend with current implementation
<oliv3r> are there memory tests in u-boot? (I know nothing about u-boot) :)
<wingrime> hramrach: we can also have some intersting functions in sram for speed and place some caches
<oliv3r> well memtest is called 'memtest86' for x86 :)
<wingrime> hramrack: sram will be in place if you don't touch it
<oliv3r> is sram not used by the arm during normal operation?
<hramrach> there is also memtester or something that runs in userspace under linux
<oliv3r> i know the VE, Nand and arm 'trustzone' use it
<wingrime> oliv3r: sram are quck normal mem
<wingrime> oliv3r: show me lines where kernel VE or nand write to it?
<oliv3r> its used internally
<oliv3r> check the datasheet; the sram controller CFG register
<wingrime> where
<oliv3r> you map certain SRAM to either be used by CPU/DMA or
<oliv3r> if you have firefox with pdf js viewer
<wingrime> oliv3r: DMA offcose can write to SRAM
<wingrime> so it have destanation in datacheet
<wingrime> I don't think that some HW device wiill write to RAM without our command
<wingrime> it not realy possible
<hramrach> not sure how bus mastering works on whatever interconnect the AW chips have
<oliv3r> you basically configure the SRAM to 'map to CPU/DMA' or 'map to VE'
<hramrach> on PCI any device can totally write to any place in memory without command unless you have one of those IOMMU chipsets
<oliv3r> note though, i only know what i found in the datasheet, i have no clue how all this works
<hramrach> also the question is if we can use the SRAM for something useful under normal operation
<wingrime> olvi3r
<oliv3r> if I would have to guess what sram is and how it works; i would have said it's die memory, that is available during boot and used as cache during normal operation (what is left over)
<hramrach> if not the suspend code can just stay there indefinitely, sure
<wingrime> oliv3r look at page 82
<wingrime> oliv3r simply not all SRAM are can be used
<oliv3r> wingrime: yes, some undocumented bits :) and the mapping
<oliv3r> wingrime: yep, SOME is available
<wingrime> oliv3r some devices have own zones
<oliv3r> calaris and I actually talked about using SRAM-B for SPL :)
<wingrime> oliv3r AREA A can be used by us
<oliv3r> he tested it in uboot, and it could read/write to sram-B without problems
<wingrime> oliv3r other can be used but not same time with HW
<oliv3r> wingrime: what about SRAM_A3_A4_MAP? 'map to AHB' (though the documetnation sucks, no doubt about it
<oliv3r> wingrime: but you are far far far more smarter about this then I am; i just read the datasheet :D
<wingrime> AHB - it global bus
<oliv3r> only way to find out, is to 'test' and see what happens
<oliv3r> wingrime: yeah, but you map that area either to cpu/dma (bit 5:4) or ... 'undefined'
<wingrime> oliv3r: SRAM have not controller at all, it simplest ram ever
<oliv3r> I guess you can best compare SRAM with 'regular ram' on a microcontroller'
<wingrime> oliv3r: some devices have direct connection to it
<oliv3r> like an AVR has about 512 bytes of ram, 'sram' :)
<wingrime> oliv3r: or it can be access using general bus
<oliv3r> and if i'd connect ddram to one of the pins (theoretically) that'd be 'normal' ram
<oliv3r> correct?
<wingrime> oli3r: we can place some hi-performance stuff to it
<wingrime> oli3r: some old IC like 8051 can ability to external sram
<wingrime> oli3r: sram (most part) a simply say, qick ram (L2 cache here)
<wingrime> oli3r: we can try place some cahces have
<wingrime> oli3r: there is some place to improve performance with
<oliv3r> wingrime: i'd love to experiment and make this happen with you; but i'm simply not smart enough for that ;)
<oliv3r> brb, gotta fixup some breakfast
<wingrime> oli3r: where "C2"
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<oliv3r> wingrime: probably something called 'ACE'
<oliv3r> http://linux-sunxi.org/SRAM_Controller may have serious errors though
<oliv3r> i may have done copy/paste/typo on the addresses
<oliv3r> and then made the mistake of wrongfully doing some math :)
<oliv3r> btw, the i, D and L2 cache are allready all sram i just ntice :)
<oliv3r> is it unreasonable to assume, if you 'map' a region to CPU/DMA it's used as L2 automagically?
<ssvb> wingrime: SRAM is not always fast, you can't take this as granted
<wingrime> ssvb: we have L2 in SRAM
<oliv3r> I and D cahce is also in sram
<wingrime> oliv34: a1-a4 100% usable
<wingrime> C1 c3 also possible usable at boot
<hramrach> hmm, interesting
<oliv3r> wingrime: so we can 'extend' l2 cache with a1 and a4?
<paulk-desktop> am I the only one to have issues with volume keys detection?
<oliv3r> wingrime: B is useable from u-boot/spl
<paulk-desktop> ie: I must press a long time to have an event create
<hramrach> the standby.bin uses different calling convention from rest of kernel
<paulk-desktop> created*
<hramrach> probably to save stack space
<paulk-desktop> with the sun4i-keyboard driver
<wingrime> oliv3r: I don't think we can do that
<oliv3r> paulk-desktop: if i'm not mistaken, volume keys are hooked up to LRADC
<paulk-desktop> yep
<paulk-desktop> so I'm wondering whether I should rewrite the driver or nor
<paulk-desktop> or not*
<oliv3r> the driver probably needs proper re-writing anyway
<oliv3r> so nothing lost there :)
<paulk-desktop> yay
<paulk-desktop> so I'll do that
<oliv3r> i haven't looked much into LRADC, but from what I understand, you could either hookup 2 buttons OR an analog 'dial' to it to control 'volume' (or whatever you want to, since it's an input)
<oliv3r> you could even turn it into a 'scrollwheel' i guess :)
<paulk-desktop> ok
<wingrime> oliv3r: I looked for lradc registers
<wingrime> oliv3r: It simple
<wingrime> oliv3r: but don't forget for drop standby.bin we must configure lradc as irq source for wakeup on suspend
<ssvb> wingrime: SRAM can be fast, but this is not always the case, in embedded systems you may have SRAM primarily optimized for low power consumption
<wingrime> ssvb: may be , but it must be faster than dram
<ssvb> wingrime: the real performance depends on how this SRAM block is connected to the CPU (it may have low clock speed and narrow bus width)
<oliv3r> in the case of A1x, it seems like it's used for both L2 cache and other tasks, so it could be fast :)
<wingrime> ssvb: not sure
<wingrime> ssvb: we have blacks
<ssvb> wingrime: not really, DRAM supports burst reads and writes, it is really good for sequential accesses but has high latency
<wingrime> ssvb: also SRAM not need commands qeues
<ssvb> yes, SRAM has lower latency
<wingrime> sram can be accessed indepently but I can't say in aur case
<ssvb> but bandwidth needs to be verified
<wingrime> ssvb: you can try
<ssvb> yes, I can :)
<ssvb> so can you
<wingrime> ssvb: if I looked to verilog files for a1x.....
<wingrime> but it defently NDA.....
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<wingrime> oliv3r: a10 have BIST ?
<wingrime> Built-in self-test
<wingrime> ?
<oliv3r> wingrime: possibly, but we know nothing of it
<wingrime> C3 must be usable also
<oliv3r> wingrime: partially, for sure
<oliv3r> btw, there's also a 'coresight debug module'
<wingrime> I thing SRAM can direct connection with some devices avoiding general soc bus
<wingrime> *can->have
<oliv3r> wingrime: i'm pretty sure it is
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<ssvb> wingrime: btw, https://github.com/ssvb/xf86-video-sunxifb/commit/24d05b1d84a23298 (testing is very much welcome)
<ssvb> wingrime: one of the possible tests is something like "time DISPLAY=:0 xterm +j -maximized -e cat some-large-text-file.txt", this is scrolling the text one line at a time without skipping
<oliv3r> why, just why. drivers/video/sunxi/disp/disp_tv.c: script_parser_fetch("audio_para", "audio_pa_ctrl",
<oliv3r> what does TV code have to do with the 'speaker' of a tablet
<wingrime> oliv3r: have a13 "B" and "C2" section ?
<oliv3r> wingrime: absolutly, no Idea.
<oliv3r> you can test with u-boot console, 'mtest' i belive?
<oliv3r> wingrime: but i'm assuming ALL arm cores have 'B' section as its used for trustzone so arm probably says its mandatory
<oliv3r> even if you'd never use it
<wingrime> oliv3r: you wan't use sram for what?
<wingrime> ssvb: are you tested neno opt for any region size?
<hramrach> well, you can DMA to sram which is presumably fast
<hramrach> but sram is small buffer and DRAM is generally good for the kind of stuff dma does
<wingrime> ssvb:maybe there is some cases when old routine better
<hramrach> so for fast connecting devices it does not seem that awesome
<hramrach> putting some cache/page table management coe there would be cool
<hramrach> no page misses on that code, ever
<hramrach> but it's probably too large in Linux
<wingrime> what do you want to move to SRAM ?
<hramrach> can't really think of anything that would bebefit from such small piece of memory
<hramrach> even if it's fast
<hramrach> how large is the usable area?
<wingrime> 40kb
<hramrach> that was the size of system ram on zx spectrum ..
<hramrach> you could run hte whole OS in that ;-)
<hramrach> heh, 'os'
<wingrime> hramrach: more defenetly
<hramrach> well, pages are 4k so you caould perhaps fit top level page table in there or something. if it's even possible for the CPU to read it from there
<wingrime> 48 kb "A" blank
<wingrime> ssvb: a10 have 256 L2 a13 have 128 L2 ?
<wingrime> hramrach 48kb generaly usable
<wingrime> but we have some interesing mem
<wingrime> ISP ???? have 64 kb
<wingrime> VE (video) 512 kb
<wingrime> but it still unclear
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<wingrime> ssvb: can you gix x11 log spam
<hramrach> the cmap spam?
<wingrime> FBIOPUTCMAP:Invalid argument
<hramrach> that's upstream problem
<hramrach> can be fixed probably
<hramrach> the 512kb from video is interesting for headless kernels I guess
<hramrach> any reasonable way to make the kernel build system compile a file twice?
<hramrach> I just #included them but that's not exactly reasonable
<wingrime> hramrach: test, are you still have problems with gadget
<wingrime> ?
<hramrach> did not test recently
<hramrach> presumably it still fails after unload /reload module
<wingrime> try agian
<wingrime> It must be in stage
<hramrach> will need to build new kernel
<hramrach> currently have the android gadget which does not cause kernel panic because it cannot be unloaded
<wingrime> hramrach: and works good?
<hramrach> etherenet works when only ethernet is enabled
<ssvb> wingrime, oliv3r: some quick and dirty benchmark for SRAM performance - https://gist.github.com/ssvb/5276498 (no miracles as expected)
<wingrime> hramrach: cam you send updated a10/a13 configs with gadget enabled
<hramrach> well, was looking into configs
<hramrach> but can only test a10
<hramrach> did not even get to testing the a10 one
<ssvb> SRAM does not need periodic refresh (which is very good for power consumption), but it is definitely not as fast as L1 cache or even L2 cache
<hramrach> and compared to dram?
<ssvb> it has better latency, but worse bandwidth
<ssvb> wingrime: yes, the NEON code in xorg driver still needs a bit of tuning to make sure that it is always a performance win (especially on Cortex-A15 chromebook)
<ssvb> hramrach: SRAM is one of many buzzword, and a lot of people just assume that it is so obviously guaranteed to be a good solution that no verification is even ever needed :)
<hramrach> is it fixed mapped or does it get paged too?
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<oliv3r> wingrime: we want to see if we can use SRAM B (which looks really good) for SPL so we can load fat/ext partitions with the extra ram :)
<oliv3r> wingrime: linux-sunxi probably lies about the memory sizes, i could have made a mistake when writing those, 512kb sram for VE sounds a bit too much
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<wingrime> olib3r: 128kb L2 on a13 and 256 on a10 can be true?
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<ssvb> wingrime: both A10 and A13 have 256K L2
<wingrime> ssvb: a13 manual say that 128k
<wingrime> 82 page
<ssvb> I'm almost sure it is a typo, every other source says 256K
<hramrach> these small caches
<hramrach> even Pentium II used to have 512kb iirc
<oliv3r> 256 L2 isn't that odd; even modern CPU's only have that sometimes
<hramrach> modern lame cpus like celerons
<ssvb> Pentium II was a high end "server" processor, a lot of users who cared about price/performance actually had Celerons
<hramrach> well, this is Chinese chip so what would you expect ..
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<ssvb> Only Samsung and Apple used 512K L2 for Cortex-A8
<hramrach> well, back then the first celerons were more powerful than the server CPUs because celerons had the cache clocked at teh cpu speed but PIIs at half .. Intel blunder
<ssvb> well, Cortex-A8 has >=10 cycles latency for L2 cache, Cortex-A9 is even worse because it uses external L2 cache
<ssvb> half clock speed is not necessarily too bad, it is still fast enough and large
<ssvb> cache misses for smaller cache are significantly slower
<hramrach> it's bad compated to full-clock
<hramrach> and some media decoders might fit into small cache
<hramrach> small working set or predictable access pattern
<ssvb> well, we have L1 / L2 / L3 caches hierarchy, each next level is slower but can have much larger size
<ssvb> L1 cache must be fast, this is really critical
<ssvb> hramrach: placing page table in SRAM might be not a bad idea and could provide performance improvement on really memory heavy workloads when the caches are thrashed badly
<ssvb> we could try to test it
<ssvb> SRAM has lower latency than DRAM, so page table walk should be a bit faster
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<hramrach> hmm, so I have like 3 ethernet and 2 serial gadgets or so which I can load
<hramrach> and audio
<hramrach> and printer
<hramrach> others don't load at all
<fra79Wii> Hi guys.. I'd like to try to good a 3.4 kernel from nand.. to actually boot android.
<fra79Wii> …to boot not good… I have tried u-boot from lichee-dev but it doesn't seems to boot the uImage, but keeping booting /dev/block/nandc
<hramrach> that's bootloader configuration
<hramrach> the default boot script probably does that
<fra79Wii> I thought I could boot fom SD and then place the boot arguments to boot band.. like boot=/dev/block/nandd… but I was wondering if I have to boot on nandd or nandb, where the boot env is
<hramrach> wingrime: I ca now unload/reload the g_ether driver without kernel panic \o/
<fra79Wii> or where the real root is.. so nandd.. I'm trying booth :P..starting with nandb
<hramrach> fra79Wii: can't you look on the nand?
<fra79Wii> I'm not sure which way is the right "android" way to boot...
<fra79Wii> if it were linux I'd boot on nandd..
<hramrach> to boot from the andriod partitions
<hramrach> so to copy the kernel to the partition where it usually is
<fra79Wii> there is nandb which is unmountable.. I didn't figured out which file system is...
<fra79Wii> agh, ok.. that's doesn't works...
<hramrach> it might be raw kenel image or boot loader config
<fra79Wii> I would like to boot a 3.4 and I haven't understand I could i do it
<hramrach> I don't use android so can't really help you wit that
<fra79Wii> so when I create a boot.img with 3.4 to flash the partition it simply doesn't boot
<fra79Wii> I was trying to find some workaround to somehow boot android with 4.2
<hramrach> do you have serial console?
<fra79Wii> 3.4…I mean.. nope, I have nothing else then a sd and a USB cable :P…. sitting on a couch..
<fra79Wii> zero equipment here
<fra79Wii> ok I try out to bypass the bootloader booting from sd_to_nand
<hramrach> really hard to ttell what fails then
<wingrime> hramrach: test cable
<hramrach> did the same test which caused kernel panic previously
<paulk-desktop> mhh, it seems that the LRADC is highly unreliable
<wingrime> hramrach: no panic when you remove cable ?
<hramrach> no panic
<wingrime> mnemoc: ^
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<hramrach> but there is some routing problem
<hramrach> when I unplud the USB cable I can still ping the board
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<hramrach> dd, when I unplug the usb the ping are routed elsewhere
<hramrach> but when the cable is plugged in they appear to go through usb
<hramrach> with lower round trip
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<paulk-desktop> oliv3r, so in the end, my issue was about the LRDAC freq being too low
<paulk-desktop> so I refactored the code and all for nothing in the end
<paulk-desktop> would it still be worth submitting to the mailing list?
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<wingrime> olib3r: do you think we can drop SPL and boot uboot directly ?
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<oliv3r> paulk-desktop: if you rewrote the driver that fast, sure :p
<oliv3r> wingrime noway; but we can make better SPL
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<wingrime> mnemoc: eLIBs_CleanFlushDCacheRegion
<wingrime> it realy required for dma?
<wingrime> strange that only sun3i have it
<wingrime> oh.. I don't right here
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<wingrime> hramrach: do you think we need some limit when send on dma
<wingrime> I mean small pieces can be sended using pio mode
<wingrime> now driver do it over dma always
<wingrime> oliv3r: ssvb: same to you
<paulk-desktop> oliv3r, well I didn't really change much to the original design of the driver, I just refactored it
<wingrime> paulk-desktop: thanks a lot
<wingrime> paulk-desktop: are you make check-patch ?
<paulk-desktop> ?
<wingrime> paulk-desktop: script/check-patch.pl
<paulk-desktop> ok
<wingrime> #define NAND_CACHE_FLUSH_EVERY_SEC
<wingrime> we realy need this one
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<paulk-desktop> wingrime, well I end up with only errors about // comments and lines over 80 chars
<paulk-desktop> is it ok to submit?
<wingrime> I think good
<wingrime> also you can
<wingrime> remove over 80 warining simple way
<wingrime> you can split anysing this "\"
<paulk-desktop> yeah but it tends to make the code less readable
<paulk-desktop> even though it's a guideline…
<wingrime> mnemoc is commiter
<wingrime> you can ask he
<wingrime> but I think all good
<wingrime> please send))
<paulk-desktop> yeah I'm installing git-send-email
<paulk-desktop> then I have a second patch to make the frequence up to 250Hz
<paulk-desktop> which is required to make fast presses detectable
<wingrime> please consider that freq means powerconsume
<wingrime> but i saw simular fix from aw in dev branch
<wingrime> so I think all god
<wingrime> *good
<paulk-desktop> there is nothing to question there, it's that or unusable
<paulk-desktop> with CWM recovery, where the interface navigation relies on volume keys, it's unusable without 250Hz
<paulk-desktop> I'll try 125Hz to see if it would be fast enough
<paulk-desktop> 125Hz is borderline: regular button press works but as soon as I want to go a bit faster, it blocks
<paulk-desktop> so I guess 250Hz is the way to go
<wingrime> paulk-desktop: I still wait CM for a13
<paulk-desktop> wingrime, I'll be porting Replicant, a fully free CyanogenMod derivative
<paulk-desktop> I guess CM would be doable as well
<paulk-desktop> I sent the patches, I'm not sure it worked
<paulk-desktop> my smtp server says ok, we'll see
<paulk-desktop> also I saw there is fedora for a13 devices -- is it gnome-shell?
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<wingrime> I use debian
<wingrime> and linaro
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<wingrime> there many problems at all
<vinifm> i used both, linaro is good
<wingrime> debian xorg have problems with touch
<wingrime> hung on suspend when xorg running
<vinifm> I had problems with wpa on Debian
<vinifm> wpasupplicant
<paulk-desktop> I see
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<leowt> how are the mali-400 x11 drivers?
<leowt> still slower than fb?
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<oliv3r> paulk-desktop: fedora 18 image is xfce4
<oliv3r> paulk-desktop: as for replicant vs cyanogenmod isn't it basically the same, except for replicant trying to replace all blobs with oss components or leave them out? In that case, it doesn't matter which you use. Mali is needed for both ;) and turl is working on CM support (http://github.com/allwinner-dev-team)
<paulk-desktop> oliv3r, yeah that's it, pretty much
<eebrah_> #lima
<paulk-desktop> though it should run fine with only free software
<paulk-desktop> since mali is fast enough without blobs
<paulk-desktop> and there is free audio and likely camera is doable too
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<shineworld> I've lost part of SystemUI but ....
<paulk-desktop> my patches didn't arrive yet it seems
<shineworld> Have you improved some thing ?
<paulk-desktop> yeah, sun4i-keyboard
<shineworld> what is this ?
<shineworld> could you explain ? thank you
<paulk-desktop> basically I had an issue with the buttons that are connected to the LRADC, and it's all dealt with on this driver
<paulk-desktop> to understand it better, I rewrote it (since it was pretty ugly)
<shineworld> cool
<paulk-desktop> and I found out my issue was about the sample frequency that was too low
<shineworld> have you submitted to what branch ?
<paulk-desktop> should be sunxi-3.0
<paulk-desktop> but it wasn't received on the list yet…
<shineworld> perfect -- what I'm using at now
<paulk-desktop> do you have commit access?
<shineworld> nope...
<paulk-desktop> ok
<shineworld> have you a personal fork ?
<paulk-desktop> no, I was too lazy to push it somewhere
<paulk-desktop> but I can upload the patches somewhere if you want
<shineworld> ok !!!
<shineworld> I will rebuild the kernel after that
<shineworld> thank you !!!
<shineworld> *someone
<Dreadlish> mine just can be stable up to 1,2GHz
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<shineworld> yeah, but I don't understand how can a tablet maker to put all them at 1.5ghz without problems
<Dreadlish> maybe he's lying ;d
<Dreadlish> or manufacturer add governor to cpu, which can manage that
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<oliv3r> paulk-desktop: it won't matter which rootfs you use for android, you'll be stuck with our kernel and that's besides cedarx and mali 100% free. and thus both replicant and cm10 will be (besides those parts) be 100% free. and i dont know what replicant does exactly (i thoght they clone cm git) you should have near identical system. granted having replicant on board wold be awesome and replicant sure could use a system as open
<oliv3r> paulk-desktop: are ou subscribed to the list? i haven't seen it yet so looks like it didn't come through. should be near instant
<oliv3r> shineworld: they all lie. most of the time what they do, is 1.1 GHz for arcore +375 MHz for mali core = almost 1.5 GHz
<oliv3r> :)
<paulk-desktop> oliv3r, yeah, so the difference with CM will be minimal
<paulk-desktop> yes I subscribed to the list
<paulk-desktop> it seems that the message didn't go through
<paulk-desktop> I used git send-email
<paulk-desktop> I'll remove my relay host and see
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<oliv3r> i had to setup my mail client specifically for git
<paulk-desktop> Well it does say:
<shineworld> by my last test I'm satisfied with mali performances on cubieboard
<paulk-desktop> postfix/smtp[25012]: E02AF3411A: to=<linux-sunxi@googlegroups.com>, relay=gmr-smtp-in.l.google.com[173.194.66.14]:25, delay=1.5, delays=0.09/0.06/0.52/0.88, dsn=2.0.0, status=sent (250 2.0.0 OK 1364681542 y5si181833wiv.3 - gsmtp)
<oliv3r> i use ssmtp to go from my localhost to a nther host
<oliv3r> FromLineOverride=YES
<oliv3r> i have to add that
<oliv3r> shineworld: libv says mali is a REALLY good chip
<oliv3r> paulk-desktop: maybe it is just delayed then
<oliv3r> have you seen my recent messages go by?
<shineworld> I've just tested it today with a 800x480 display
<oliv3r> gg is very stupid with attachements/patches
<paulk-desktop> oliv3r, yeah
<oliv3r> anybody tried dual-head?
<oliv3r> lcd +hdmi?
<shineworld> nope
<shineworld> I will try but at now I haven't an HMI monitor
<shineworld> however I don't know how to work with 2 framebuffers
<shineworld> so I need to have an LCD with same size of HMI monitor to do the test
<shineworld> a little bit useless test
<oliv3r> :)
<ssvb> oliv3r: I used vga+hdmi dual-head
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