Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
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<wens> icenowy[m]: why is that exactly? drm_hwcomposer needs gpu?
<wens> icenowy[m]: btw, have you done any more work on h6? mmc for example?
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<forkbomb> wens: iirc drm_hwcomposer uses gpu to compose all layers (instead of just those supported by the display hw): https://android.googlesource.com/platform/external/drm_hwcomposer/+/master/glworker.cpp
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<wens> forkbomb: sounds like a waste of hardware compositing resources :p
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<icenowy[m]> icenowy[m]: see my github h6-init branch
<icenowy[m]> mmc, usb2/3
<icenowy[m]> and eth
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<mripard> forkbomb: I'm not sure it does, or it changed compared to when it was introduced then
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<forkbomb> mripard: hm, ok. it's been a while since i tried to use it, so i could be wrong
<forkbomb> last time i tried it also needed GLES 3, so mali 400 couldn't use it out-of-the-box anyway
<wens> icenowy[m]: nice, that is a lot of stuff
<mripard> forkbomb: maybe I'm confusing it with something else though
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<wens> icenowy[m]: I have some comments about the AXP805 stuff (basically, it was already submitted before for an A80 board, which is why we have the "master-mode" property for the AXP806)
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<icenowy[m]> wens: just comment on github ;-)
<wens> hmm, I remembered the wrong model number :/
<mripard> icenowy[m]: can you put the actual list of items you're working on for the H6 ?
<mripard> claiming support for a whole SoC doesn't really help, since we can't realistically expect you to work on everything at the same time
<mripard> but no one can work on what you're not working on either
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<wens> I put that entry there, as I was being lazy
<wens> but to her credit, she did already get through a number of the basics to get a nice headless system
<icenowy[m]> mripard: maybe I claimed nothing now
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<mripard> wens: oh, so you did it, sorry icenowy[m] :)
<wens> icenowy[m]: sorry for the confusion
<wens> mripard: I updated it with specifics
<wens> and the 4.17 entry should be mostly correct (I didn't go through all the driver commits)
<icenowy[m]> wens: are you still WIP on the LInux_mainlining_effort page?
<icenowy[m]> I think the matrix should be updated
<icenowy[m]> for H6
<wens> icenowy[m]: I'm done with it for now
<wens> I might have to go through the matrix later to update the stuff for 4.17
<icenowy[m]> and for H6 PCIe I will make it black now
<naggety> Hi guys. Yesterday I asked for some help, and I didn't get any response. If you don't mind, I copy & paste my question from yesterdaty and let's see if someone can tell me something helpful.
<naggety> Hi. I hope someone can help me with this. I'm making a sunxi-linux system for an A20 SoC using Buildroot. I want to have 2 monitors: one LCD and one analog TV (CVBS, PAL). At the same time I want to use TV decoder to input image from 4 cameras.
<naggety> I'm using legacy sunxi-linux 3.4. I made TV decoder working thanks to this driver: https://github.com/meantone/sunxi-tvin
<naggety> My problem is that when I modprobe that driver for TV decoder, the second monitor (the TV one) stop working
<naggety> However, LCD + TV decoder work fine. LCD + TV output work fine. TV output + TV decoder work fine. All three at the same time doesn't work
<naggety> That's it. Any help or guidance about where to look would be appreciated.
<wens> you're probably not going to get much help with the 3.4 kernel :|
<KotCzarny> a20 has tv-in?
<KotCzarny> or its some custom hw?
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<wens> it does, 4 channel cvbs
<KotCzarny> never seen it exposed
<naggety> I know, but unfortunately I need to use that version. I don't expect any kind of support, but maybe an advice that let me look to the right place.
<icenowy[m]> a10/a20/r40 all have tvin
<icenowy[m]> yes nearly no board will expose it
<naggety> Yes, 4 channel cvbs, right. I'm using Olimex A20-SOM board
<icenowy[m]> KotCzarny: some vehicle-based solutions with T2(A20)/T3(R40) may use them
<icenowy[m]> ok created the first black block in the mainline status matrix :-(
<naggety> The board exposes all TV-in channels, and I have it working yet. The problem is to use the 3 things at the same time: LCD output + TV output + TV input
<mripard> icenowy[m]: can we get the amount of space a device would require when it's detected on the PCIe bus ?
<naggety> I was wondering if it could be not enough CMA
<naggety> But I couldn't increase it because it collides with G2D memory address and LCD memory address, and I don't know how to move them
<naggety> (I neither know if it makes any sense that CMA can be the problem)
<KotCzarny> increase via boot param and test?
<icenowy[m]> mripard: no, as everything are muxed
<mripard> icenowy[m]: ok :/ too bad
<wens> naggety: you might be hitting clock issues, as there are only 2 PLLs for all things video-related
<icenowy[m]> wens: will it work if a of compatible is attached to different drivers for different bus?
<naggety> KotCzarny: I tried that, adding cma=256M to bootargs. But it says that cma could not be allocated, it collides with G2D and LCD memory regions.
<KotCzarny> try something smaller then
<wens> naggety: so if you have 3 incompatible dot-clocks, it's not going to work out
<gnarface> 90M is a sane value for CMA
<icenowy[m]> mripard: I'm thinking of using hypervisor to wrap it, but I'm not familiar with ARM hypervisor
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<icenowy[m]> yes I also think it's dot-clock issue
<gnarface> 64M <i>should</i> be a sane value for CMA, but i ran into something that it wasn't enough for (i forget what)
<icenowy[m]> usual Allwinner SoCs have only two video PLLs
<wens> icenowy[m]: yes it will work, the bus is in charge of registering new devices and match it against some list of drivers, typically its own bus
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<wens> icenowy[m]: so the list for i2c and rsb is separate, and the i2c core will only register devices that match against i2c drivers
<naggety> wens: thanks, I'm going to read about clocks and PLL in the SoC manual. If I stuck, I will ask again
<pmpp> gnarface: for 2K hevc need 80MiB
<gnarface> pmpp: good to know but whatever it was definitely wasn't running at 2k
<icenowy[m]> wens: ok
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<icenowy[m]> P.S. for RSB chips if they're started from I2C
<icenowy[m]> how did them switch to RSB?
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<wens> the RSB driver commands the RSB controller to send the init sequence
<wens> which is basically an I2C write to the interface mode register of all chips
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<icenowy[m]> interesting
<icenowy[m]> wens: so for "all chips" you mean send it to every I2C address?
<wens> it sends it to address 0x00, which I assume would mean broadcast
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<naggety> The TV-in driver seems to modify 2 clocks: video_pll0 and tvdmod1
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<naggety> wen: i2c 0x00 address is broadcast, yes
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<naggety> LCD Controller (LCDC) is the same than DEBE + DEFE?
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<wens> no
<wens> display pipeline = DEFE->DEBE->LCDC
<naggety> and the LCDC is who control TV-out? Or only LCD panels?
<naggety> (The second, I guess...
<wens> LCDC can output to TV-out, HDMI, or LCD panels
<naggety> Ok
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<naggety> Can you please take a look to the function tvd_clk_init in this file: https://github.com/meantone/sunxi-tvin/blob/master/sun7i_tvd-linux-3.4-working/drv_tvd.c ?
<hanetzer> just a question into the wind: any of you guys familiar with grain media's arm SoC's ?
<naggety> What I understand is that it modify clock tvdmod1 clock, video_pll0, and it assign video_pll0 to have tvdmod1 as source. I am right?
<naggety> How can I know what clocks and PLLs I'm using for LCD and TV-out, and their freqs?
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<KotCzarny> you can read registers and decode them
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<hanetzer> devmem2 :)
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<KotCzarny> yes, and a20 user manual
* hanetzer finds it a fairly useful tool when scoping out an arm system :)
<naggety> Sorry, I have no experience with Linux. devmem2 lets me to read registers?
<KotCzarny> hmm, why is there no copy on sunxi page too?
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<KotCzarny> naggety: yes
<naggety> Thanks, KotCzarny, I already had the manual
<naggety> I'm going to try with devmem. If anybody knows an easier way (maybe where to look to the default values) please let me know.
<KotCzarny> no one has written subxi-info tool, so its the only way i guess
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<Pe3ucTop> TheSeven: about your question SPI speed , working with ~24..25 Mhz without problems.
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<Pe3ucTop> Hey, could anybody check SPI Dual mode patch on Allwinner sun6i/sun8i other then V3s CPU ?
<BenG83> does anyone have a Yuntab B102? with a A64...
<Pe3ucTop> TheSeven: My research about SPI MBC / MWTC / STC registers -> MBC : Total number of bursts affect include all together Tx, Dummy, Rx ; MWTC -> Effect count of Tx data will be taken from TX FiFo, Tx part length. Put attention, by default sun6i/8i SPI TX is in Dual Mode (transmit on both pins MISO & MOSI), if needed Single mode -> STC need be defined , if it is equal to MWTC then all in Single mode, otherwice Single mode transmit go first (untill empty
<Pe3ucTop> After transmit, goes Dummy burst (do not know behaviour dual/single mode, did not experimented with it).
<naggety> OK, I have it working. I found that LCD was using video_pll1 at 297MHZ, and TV-out video_pll0 at 270MHz. TV decoder driver was using pll0 at 297MHz, hard-coded, which messed TV-out.
<naggety> Changing TV decoder driver to use pll1, which already have the same freq it needs, everything seems to work
<Pe3ucTop> and after SPI dummy burst goes RX, by default RX is in Single mode, to switch to SPI Dual Mode DRM bit need be set.
<naggety> Thanks wens, hanetzer and KotCzarny
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<naggety> btw, if it can be useful for someone: I found what pll were used and with what freq in function disp_clk_cfg of file drivers/video/sunxi/disp/disp_clk.c. I have had to add some messages printing.
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<ak_hepcat> Good morning from Alaska: My pine64+(2g) on any mainline kernel (armbian stable/testing, or latest 4.16.0-rc7) doesn't see USB connections on either port. Any ideas for further troubleshooting, or specific kernel driver tweaking?
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<KotCzarny> hmm, sun8i_ths driver seems to be doing its job, but why it's not exposing temperature anywhere in /sys ?
<pmpp> cooling by obfuscating :)
<KotCzarny> pah
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<KotCzarny> opipc idles ~33C with 4.16 (with heatsink and in closed case
<KotCzarny> not bad
<KotCzarny> ~23C ambient
<KotCzarny> friggin' allwinner, why did they abandon cooling by lowering voltage/freq
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<hanni76> how to correctly identify a subsystem for a patch ?
<hanni76> is there a list of subsystems anywhere ?
<BenG83> get_maintainer.pl probably?
<hanni76> thx
<BenG83> step 7
<hanni76> ok
<hanni76> Person A <person@a.com> (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT))
<hanni76> X86 ARCHITECTURE (32-BIT AND 64-BIT) is a subsystem ?
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<BenG83> what files are you changing?
<hanni76> BenG83, wait.. I'd like to know if there is a generic procedure to identify a subsystem needed
<hanni76> let's say I want to change a file in drivers/gpu/drm
<hanni76> drivers/gpu/drm/sun4i
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<webuser5224> Hello everyone
<webuser5224> I have an Orange Pi Zero, but the wifi seems a bit unreliable
<webuser5224> I also read that this is a common problem
<KotCzarny> yes, get another wifi card
<webuser5224> Is there any board with similar specifications that has a better wifi chip?
<webuser5224> Or does that not make much sense and should I rather add a wifi dongle?
<webuser5224> I need all the ports :(
<KotCzarny> you are better with usb dongle
<KotCzarny> use usb hub?
<KotCzarny> for slow interfaces
<webuser5224> I want to keep a small form factor
<webuser5224> Are RTL8189 or AP6212 any better?
<KotCzarny> a bit
<KotCzarny> but not much
<KotCzarny> i like ralink 5370 or 5572
<DonkeyHotei> ralink 11n drivers are bad
<KotCzarny> not as bad as realteks cheapest of the cheap hw
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<webuser5224> Maybe I shouldn't use the default antenna on the OPi Zero, but the wifi reception is literally very bad
<webuser5224> I had issues getting a few resources via apt etc.
<KotCzarny> no, xr819 is bad
<DonkeyHotei> the xradio driver was never finished
<KotCzarny> and driver even worse
<webuser5224> oh ok
<DonkeyHotei> ap6212 is broadcom, no?
<webuser5224> I read it is
<webuser5224> A combination of wifi and bt from broadcom, it said
<DonkeyHotei> if i had no choices other than ap6212, xr819, or rtl8189, i'd probably pick rtl8189, but ugh
<webuser5224> Well, those are the ones I found so far
<webuser5224> But I'd like some solution that is not too large or doesn't draw too much power
<DonkeyHotei> there might be other choices on usb
<KotCzarny> i've never had any stability problems with rt5370
<KotCzarny> and will soon be testing it as a ap too
<DonkeyHotei> ralink 11n drivers need a ground-up rewrite
<KotCzarny> wfm
<KotCzarny> which i cant say about realteks random disconnects
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<DonkeyHotei> completely unusable as an ap unless you use the ancient ralink vendor driver
<KotCzarny> DonkeyHotei: preliminary tests show that it works just fine (tested briefly with nokia n900 as a client)
<DonkeyHotei> leave it up for a couple of weeks and you'll see
<KotCzarny> anyway, bedtime
<DonkeyHotei> it simply stops passing traffic after a while
<DonkeyHotei> only a reboot fixes that
<webuser5224> Are those mini antennas on the OPi Zero models also a problem? Or does it depend on the wifi chip mostly?
<DonkeyHotei> antenna may affect range, but it's one of several factors
<DonkeyHotei> look for adapters with the ar9271 chipset
<DonkeyHotei> that will give you the least headache in ap mode on 2.4GHz
<webuser5224> I actually have one, yeah
<webuser5224> But it's huge in comparison
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<webuser5224> I'd also need more than one USB port on my board then
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<hanni76> webuser5224, you need OrangePi PC+
<DonkeyHotei> hanni76: which wifi chip does that have?
<hanni76> RTL
<webuser5224> I'm a bit limited because I want to run it from a battery
<TheSeven> hmm I'm having some issues with DMA losing bursts of data
<TheSeven> someone ever had that before?
<hanni76> rtl8189fs, to be exact
<DonkeyHotei> there are opi-like devices that come with a battery, too
<DonkeyHotei> travel routers etc
<TheSeven> it seems like occasionally one RAM=>SPI 32bit transfer gets lost, and around the same time one SPI=>RAM 512bit burst gets lost
<TheSeven> seems to happen every couple thousand DMA transfers
<hanni76> webuser5224, power consumption is something that can be tuned
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<BenG83> TheSeven, maybe some error handling is missing there?
<BenG83> are there flags for DMA errors or sth?
<TheSeven> I can't see how an error could even occur there
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<TheSeven> I mean this would have to be an AHB bus level error
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<TheSeven> and why should the SPI slave ever return that?
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<TheSeven> it looks like the DMA fails to increment an internal counter or is doing it twice in some race condition
<TheSeven> or maybe an issue with the SPI FIFOs
<BenG83> mmmh
<TheSeven> neither DMA nor SPI really have any error conditions
<TheSeven> and this seems to happen between every 100k to 10M transfers, randomly
<TheSeven> and I don't mean bytes but actual DMA operations
<TheSeven> I'm seeing it every couple of minutes while pushing 50Mbit/s through SPI
<TheSeven> but sometimes it lasts for half an hour
<BenG83> does it happen at much lower speeds too?
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<BenG83> like 5Mbit/s ?
<TheSeven> it's always the same resulting state though: TX DMA is finished, SPI TX buffer is empty, SPI transfer size says 4 bytes left (where did those go missing?), SPI RX buffer contains 16 bytes (and would only trigger DMA at 32), RX DMA still wants to receive 52 bytes
<TheSeven> haven't tried yet - would take ages to reproduce at slower speeds
<TheSeven> I may try that overnight
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<TheSeven> hmm I'm wondering if this may be TX DMA clashing with RX DMA somehow while competing for the SPI peripheral on the bus
<BenG83> we don't have any errata sheets for AW SoC sadly
<TheSeven> I doubt that they would have even discovered this
<TheSeven> these peripherals probably don't see a lot of high-load testing/applications
<BenG83> true
<TheSeven> let me play with the DMA trigger thresholds...
<BenG83> I have the problem on RK3328 that SPI DMA is completely broken
<TheSeven> maybe I can offset the TX vs. RX DMA bursts by adding half a burst to the RX watermark
<TheSeven> heh and on MT7621 SPI is completely broken ;)
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<DonkeyHotei> openwrt seems to read/write nor flash just fine on mt7621 for me
<TheSeven> as in the hardware is a complete misconception, specifically designed to access flash memory and nothing else, and not supporting accesses of more than 32 bytes with one request (which is pretty pointless especially for flash), and on top of that it has a really weird bus-side glitch where it mixes up bits in some cases
<TheSeven> that only happens with full-duplex transfers though, so it's indeed fine (but slow as hell) for flash access
<TheSeven> getting that to talk to NRF24L01 or CC1101 or similar sub-GHz RF modules required a major rework
<DonkeyHotei> at least it's not broadcom, right?
<TheSeven> heh never had to mess with broadcom yet, but even from a higher level view the first-gen RPi was just urgh...
<DonkeyHotei> right
<TheSeven> this H3 that I'm working with right now consumes less power running full tilt than the RPi was drawing idle
<TheSeven> not to even talk about performance...
* TheSeven hopes nanopi neo core boards will be back in stock soon
<TheSeven> hmm so far it's going strong with TX and RX dma watermarks shifted apart by 16 (half a burst)
<TheSeven> but it will take hours until I can be somewhat sure that it doesn't happen anymore
<TheSeven> I've had it run just fine for half an hour before it suddenly crashed
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* willmore is following TheSeven's work.
<TheSeven> willmore: too bad that most of what I'm doing won't be terribly useful to others - it's highly application specific
<TheSeven> sure, it will likely produce a bit of insight about the hardware
<TheSeven> but what I'm doing right now is wrapping the SPI and DMA peripherals into a userspace I/O device (that also exposes a contiguous coherent buffer), then using that to pump data to an FPGA from userspace
<TheSeven> the regular kernel SPI API just doesn't provide the performance required by my application - keeping CPU overhead minimal is crucial here
<BenG83> does anyone know if spidev can support extra chipselects via GPIOs?
<TheSeven> yes, it should support that already
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<TheSeven> it doesn't use HW chip select at all
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<TheSeven> (i.e. drives the HW chip select pin like a GPIO)
<TheSeven> I haven't tried, but I'd assume that you can just plug arbitrary GPIOs into the device tree there and it should just work
<TheSeven> half an hour (~2 million DMA ops) and it still hasn't crashed, this is starting to look promising
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<BenG83> TheSeven, if you have time maybe add those findings to the wiki...
<TheSeven> hmm there aren't really that many findings, other than that DMA has at least 2 bugs when talking to SPI (doesn't like non-incrementing address on RAM side, doesn't like TX and RX bursts at the same time?), and SPI seems to generally fail above 50MHz (and I don't have a fast enough scope yet to check what's going on there)
<TheSeven> but let's wait for a night and see if this is actually stable now, or if I'm just chasing the next red herring here...
<TheSeven> this is like the 3rd time now that I'm thinking that I've finally caught the root cause, but it seems to just be happening more rarely
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<hanetzer> lvrp16: heyo, any news regarind hisi?
<lvrp16> what about hisi?
<lvrp16> 960 970?
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<lvrp16> hanetzer:
<hanetzer> lvrp16: you had mentioned that there was some outsourcing done to get the hi3559a upstreamed a while back
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