sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<GitHub61> [smoltcp] whitequark commented on issue #187: It seems we have two separate things at work here:... https://github.com/m-labs/smoltcp/pull/187#issuecomment-380649432
<GitHub85> [smoltcp] whitequark commented on pull request #190 91fdc1f: `ident` https://github.com/m-labs/smoltcp/pull/190#discussion_r180947252
<GitHub132> [smoltcp] whitequark commented on pull request #190 91fdc1f: Also, you probably should use a ManagedMap here instead of hardcoding a linear search. https://github.com/m-labs/smoltcp/pull/190#discussion_r180948337
<GitHub160> [smoltcp] whitequark commented on pull request #190 91fdc1f: Also log it, with a different message indicating that fragmentation is not supported. https://github.com/m-labs/smoltcp/pull/190#discussion_r180946772
<GitHub185> [smoltcp] whitequark commented on pull request #190 91fdc1f: Nit: smoltcp uses only spaces for indentation.... https://github.com/m-labs/smoltcp/pull/190#discussion_r180946379
<GitHub52> [smoltcp] whitequark commented on pull request #190 91fdc1f: `if let Some(front) = self.assembler.peek_front()` https://github.com/m-labs/smoltcp/pull/190#discussion_r180947500
<GitHub26> [smoltcp] whitequark commented on pull request #190 91fdc1f: Better not include the module at all if built without the fragmentation feature. https://github.com/m-labs/smoltcp/pull/190#discussion_r180947175
<GitHub89> [smoltcp] whitequark commented on pull request #190 91fdc1f: This isn't enough. You need to at least match the ident field with the source IP, because otherwise you're introducing a vulnerability: anyone who knows that there is a flow of fragmented packets has an 1/65536 chance of arbitrarily altering their contents. This is a 100% viable attack vector and very similar attacks (utilizing the port number, but the c
<GitHub157> [smoltcp] whitequark commented on pull request #190 91fdc1f: Yuck. Is there a reason `InterfaceInner::process_ethernet` cannot access its very own field? https://github.com/m-labs/smoltcp/pull/190#discussion_r180946501
<GitHub124> [smoltcp] whitequark commented on pull request #190 91fdc1f: `has_header` https://github.com/m-labs/smoltcp/pull/190#discussion_r180947265
<GitHub140> [smoltcp] whitequark commented on pull request #190 91fdc1f: I think `Packet` would be much cleaner if instead of these empty values and `set_id` it was defined like...... https://github.com/m-labs/smoltcp/pull/190#discussion_r180948044
<GitHub136> [smoltcp] whitequark commented on pull request #190 91fdc1f: Why is this `pub`? https://github.com/m-labs/smoltcp/pull/190#discussion_r180947288
<GitHub194> [smoltcp] whitequark commented on pull request #190 91fdc1f: Exception? There are no exceptions in Rust. The only sensible course of action here is to log it. https://github.com/m-labs/smoltcp/pull/190#discussion_r180946652
<GitHub91> [smoltcp] whitequark commented on pull request #190 91fdc1f: Why is it generic over `T`? We'll never want to defragment anything except `u8`. This just results in silly `T: Clone` bounds on functions. https://github.com/m-labs/smoltcp/pull/190#discussion_r180947397
<GitHub84> [smoltcp] whitequark commented on pull request #190 91fdc1f: This doesn't belong in this pull request. Please submit it separately and we'll have a discussion about it; in particular, you're counting 802.1Q, but not QinQ or QinQinQ.... https://github.com/m-labs/smoltcp/pull/190#discussion_r180948714
<GitHub75> [smoltcp] whitequark commented on issue #190: Please *please* fix indentation. It makes the code very hard to read. https://github.com/m-labs/smoltcp/pull/190#issuecomment-380653337
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<GitHub172> [smoltcp] whitequark commented on issue #180: @m-labs-homu r+ https://github.com/m-labs/smoltcp/pull/180#issuecomment-380688972
<GitHub20> [smoltcp] m-labs-homu commented on issue #180: :pushpin: Commit 811a32b has been approved by `whitequark`
<GitHub82> [smoltcp] whitequark commented on issue #180: @dlrobertson Sorry for the delay! https://github.com/m-labs/smoltcp/pull/180#issuecomment-380688999
<GitHub53> [smoltcp] m-labs-homu pushed 1 new commit to auto: https://github.com/m-labs/smoltcp/commit/4aeeac09d564378f217131f5adf46c9b72a1fae2
<GitHub53> smoltcp/auto 4aeeac0 Dan Robertson: Add Packet support for NDISC packet types...
<GitHub17> [smoltcp] m-labs-homu commented on issue #180: :hourglass: Testing commit 811a32b1f80fd9fabbc2aa47281dd54c4d661a9b with merge 4aeeac09d564378f217131f5adf46c9b72a1fae2... https://github.com/m-labs/smoltcp/pull/180#issuecomment-380689018
<travis-ci> m-labs/smoltcp#858 (auto - 4aeeac0 : Dan Robertson): The build passed.
<GitHub62> [smoltcp] m-labs-homu commented on issue #180: :sunny: Test successful - [status-travis](https://travis-ci.org/m-labs/smoltcp/builds/365457252?utm_source=github_status&utm_medium=notification)
<GitHub6> [smoltcp] m-labs-homu merged auto into master: https://github.com/m-labs/smoltcp/compare/27d82a58361f...4aeeac09d564
<GitHub72> [smoltcp] m-labs-homu closed pull request #180: Add Packet support for NDISC packet types (master...ndisc) https://github.com/m-labs/smoltcp/pull/180
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<travis-ci> m-labs/smoltcp#859 (master - 4aeeac0 : Dan Robertson): The build passed.
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<GitHub-m-labs> [artiq] sbourdeauducq pushed 1 new commit to release-3: https://github.com/m-labs/artiq/commit/e93a07bc8d08983d4b0aebbf86e5ecab59aee65a
<GitHub-m-labs> artiq/release-3 e93a07b Sebastien Bourdeauducq: doc: update Sinara information
<GitHub-m-labs> [artiq] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/f96f597ecbffd6ca66f11a94ae705db0ebf90e2c
<GitHub-m-labs> artiq/master f96f597 Sebastien Bourdeauducq: doc: update Sinara information
<GitHub-m-labs> [artiq] sbourdeauducq pushed 1 new commit to release-3: https://github.com/m-labs/artiq/commit/66817e3b82b3248cb2f347eb788e9541a75739e0
<GitHub-m-labs> artiq/release-3 66817e3 Sebastien Bourdeauducq: doc: add note about Sinara requiring ARTIQ-4+
<sb0> _florent_, any progress with JESD204 sync?
<sb0> is serwb working correctly now or are there still crashes?
<sb0> there is also #966 ...
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<sb0> hartytp, if you want to work around the new SDRAM issue, we can give you access to the HKG server
<sb0> if that helps...
<whitequark> I ought to set up another sayma then
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<GitHub-m-labs> [artiq] whitequark commented on issue #854: @jbqubit Our media converter is TP-Link MC220L and the switch is Netgear GS608. https://github.com/m-labs/artiq/issues/854#issuecomment-380708051
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<hartytp> sbo: Thanks!
<hartytp> Let me try to figure out what's wrong on my board first
<_florent_> sb0: i did some with tests with serwb, as discussed in the issue, hartytp is going to give some feedback on that.
<hartytp> Want to try mmc update
<hartytp> Who knows maybe it's a pi issue
<bb-m-labs> build #1419 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1419
<hartytp> Would also be interested to hear if the new fw foxes your 1v8 issues. I cant test that as i dont see that particular problem on my board
<hartytp> Fixes
<bb-m-labs> build #830 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/830
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<bb-m-labs> build #2252 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2252
<sb0> ah vivado 2018.1 is out
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<bb-m-labs> build #1420 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1420
<bb-m-labs> build #831 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/831
<bb-m-labs> build #2253 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2253
<bb-m-labs> build #1421 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1421
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<bb-m-labs> build #832 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/832
<bb-m-labs> build #2254 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2254
<GitHub-m-labs> [artiq] sbourdeauducq commented on issue #854: That media converter causes some obscure bug with the PHY that results in a few percents of packets being lost. The transceiver that works correctly is a HP 453578-001 (@jbqubit I sent you the picture last week).... https://github.com/m-labs/artiq/issues/854#issuecomment-380760416
<GitHub-m-labs> [artiq] sbourdeauducq commented on issue #854: That media converter causes some obscure bug with the PHY that results in a few percents of the packets being lost. The transceiver that works correctly is a HP 453578-001 (@jbqubit I sent you the picture last week).... https://github.com/m-labs/artiq/issues/854#issuecomment-380760416
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<GitHub-m-labs> [artiq] hartytp commented on issue #981: Updating the Exar firmware didn't change this (https://github.com/sinara-hw/sinara/issues/358#issuecomment-380782891), so I'll proceed as Greg suggested soon. https://github.com/m-labs/artiq/issues/981#issuecomment-380783849
<GitHub-m-labs> [artiq] marmeladapk commented on issue #854: @sbourdeauducq I wanted to run your ethernet yak-shaving tools. I synthesied both (renamed eth_rgmii to eth in sayma_transmitter.py), loaded them using vivado and connected sayma <-> sata <-> sfp <-> ethernet <->kc705 rj45 on fp.... https://github.com/m-labs/artiq/issues/854#issuecomment-380784251
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<hartytp> is there anything special I need to do to get access to a CSR from a kernel?
<hartytp> I'm currently getting "[ 10.173307s] ERROR(runtime::session): session aborted: invalid kernel CPU pointer 0x0"
<hartytp> (doing what I discussed with whitequark last night)
<hartytp> I guess I use register_kernel_cpu_csrdevice instead of csr_devices.append()
<hartytp> and add an entry to mem_map
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<GitHub-m-labs> [artiq] marmeladapk commented on issue #854: @sbourdeauducq I wanted to run your ethernet yak-shaving tools. I synthesied both (renamed eth_rgmii to eth in sayma_transmitter.py), loaded them using vivado and connected sayma <-> sata <-> sfp <-> ethernet <->kc705 rj45 on fp.... https://github.com/m-labs/artiq/issues/854#issuecomment-380784251
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<GitHub20> [smoltcp] dlrobertson opened pull request #191: Add Repr support for NDISC packets (master...ndisc) https://github.com/m-labs/smoltcp/pull/191
<GitHub196> [smoltcp] dlrobertson commented on issue #191: After this we can start on address resolution on IPv6! https://github.com/m-labs/smoltcp/pull/191#issuecomment-380872000
<GitHub90> [smoltcp] astro commented on issue #187: Ok, I reordered this PR with the updated tests first and had CI trigger on them.... https://github.com/m-labs/smoltcp/pull/187#issuecomment-380872667
<GitHub114> [smoltcp] astro commented on pull request #187 4297051: TcpSocket is acking the same seq_number for a second time. Is that another bug? https://github.com/m-labs/smoltcp/pull/187#discussion_r181150617
<GitHub115> [smoltcp] astro commented on pull request #187 4297051: TcpSocket is acking the same sequence number for a second time. Is that another bug? https://github.com/m-labs/smoltcp/pull/187#discussion_r181150617
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<GitHub185> [smoltcp] podhrmic commented on pull request #190 91fdc1f: Done. On a side note, fragmentation is currently a part of the default features. If I remove it, it makes building the server_fragmented example really verbose (you have to enumerate all features). Is there some better way how to do that? https://github.com/m-labs/smoltcp/pull/190#discussion_r181172981
<GitHub122> [smoltcp] podhrmic commented on pull request #190 91fdc1f: Fixed. https://github.com/m-labs/smoltcp/pull/190#discussion_r181174033
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<GitHub22> [smoltcp] podhrmic commented on pull request #190 91fdc1f: Yes, this one was actually quite tricky. I am happy to explain in more detail, but in short, the problem was that to access fragments from `self` I needed a mutable borrow of self, but the following processing (such as `process_udp`) uses a non-mutable borrow. And because the reassembled packet is points to `mut self`'s buffer it didn't pass the borrow che
<GitHub-m-labs> [picam] jordens pushed 6 new commits to master: https://github.com/quartiq/picam/compare/6ffa9ea7810b...0dbcab9ff1d4
<GitHub-m-labs> picam/master 991aebb Robert Jordens: clean up test.py
<GitHub-m-labs> picam/master 02f7ce6 Robert Jordens: remove interceptor binary
<GitHub-m-labs> picam/master 69d2cd8 Robert Jordens: gcc -O2 interceptor
<GitHub167> [smoltcp] podhrmic commented on pull request #190 91fdc1f: But I need to include `FragmentSet` because interface now contains `fragments: Option<FragmentSet<'e>>`, except without enabled fragmentation it compiles away as it is always None https://github.com/m-labs/smoltcp/pull/190#discussion_r181178474
<GitHub151> [smoltcp] podhrmic commented on pull request #190 91fdc1f: because `process_ipv4_fragment` returns `return Ok(Some(Ipv4Packet::new_checked(&fragment.rx_buffer[0..front])?));`... https://github.com/m-labs/smoltcp/pull/190#discussion_r181179024
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<GitHub173> [smoltcp] podhrmic commented on pull request #190 91fdc1f: I meant return an error. Fixed. https://github.com/m-labs/smoltcp/pull/190#discussion_r181205899
<GitHub167> [smoltcp] podhrmic commented on pull request #190 91fdc1f: Fixed https://github.com/m-labs/smoltcp/pull/190#discussion_r181205937
<GitHub123> [smoltcp] podhrmic commented on pull request #190 91fdc1f: should be fixed https://github.com/m-labs/smoltcp/pull/190#discussion_r181206580
<GitHub28> [smoltcp] podhrmic commented on pull request #190 91fdc1f: fixed https://github.com/m-labs/smoltcp/pull/190#discussion_r181206801
<GitHub120> [smoltcp] podhrmic commented on pull request #190 91fdc1f: Fixed. https://github.com/m-labs/smoltcp/pull/190#discussion_r181209167
<GitHub74> [smoltcp] podhrmic commented on pull request #190 91fdc1f: Fixed https://github.com/m-labs/smoltcp/pull/190#discussion_r181209269
<GitHub145> [smoltcp] podhrmic commented on pull request #190 91fdc1f: fixed https://github.com/m-labs/smoltcp/pull/190#discussion_r181209963
<GitHub68> [smoltcp] podhrmic commented on pull request #190 91fdc1f: This is needed to get the fragmentation to work. In Linux MTU refers to the max length of the ethernet payload. But smoltcp counts MTU as max length of the ethernet frame. Hence without this added ethernet length, all fragmented packets are truncated. I am happy to fix is more meaningfully later, but without this fix the fragmentation reassembly doesn't wo
<GitHub-m-labs> [artiq] jbqubit commented on issue #854: > By default they work in 1000Base-X mode and usually work, the only negotiation they may need is Pause. This is one of the things that need to be implemented in MMC - the PHY has several associated register that need to be updated.... https://github.com/m-labs/artiq/issues/854#issuecomment-380946319
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<hartytp> okay, added CSR using self.submodules.my_csr_module = MyCSRModule(platform)
<hartytp> self.register_kernel_cpu_csrdevice("my_csr_module")
<hartytp> added entry to mem_map
<hartytp> added entry to api.rs for my_csr_write
<hartytp> wrote an artiq experiment which defiens the corresponding syscall
<hartytp> hooked the csr.storage up to a led output on Kasli
<hartytp> when I run an experiment with a run that turns the led on/off once it all works fine (led does what it should do)
<hartytp> but, putting it in a loop doesn't work
<hartytp> e.g. https://hastebin.com/
<hartytp> seems to turn the led (at least partially) permanently on
<rjo> it's not rtio. delay() has no effect on timing
<hartytp> right, that was my guess
<rjo> it works as intended.
<hartytp> I assumed so, I just haven't figured out how it's intended to work yet ;)
<rjo> what is your intention?
<hartytp> so, is the idea that this kind of system call is executed straight away without paying attention to now
<hartytp> true, it's not rtio
<hartytp> but, if I read from a csr in an experiment
<hartytp> when does that take place?
<hartytp> as soon as the cpu reaches the instruction?
<rjo> yes. no magic.
<hartytp> if so, is there a spin_until_now
<hartytp> function or similar?
<hartytp> is there a way of very roughly synchronising csr reads/writes with rtio
<rjo> there is sync() and count() on the ttl channels that have that as a sideeffect.
<rjo> or spi.read()
<hartytp> okay.
<hartytp> otherwise, I guess I can implement a spin_until_now function in rust easily, although it's not something one would ever normally want to do
<rjo> just while rtio_counter() < now_mu(): pass
<hartytp> right
<rjo> look at those functions i just pointed out.
<hartytp> thanks
<hartytp> I guess that for the level of timing precision I'm after (100ms or worse) I can have my run method on the host pc
<GitHub-m-labs> [picam] jordens pushed 1 new commit to master: https://github.com/quartiq/picam/commit/2ca6f0f87112450802564a99a125a74331d5090e
<GitHub-m-labs> picam/master 2ca6f0f Robert Jordens: test temperature
<hartytp> if I do that, the delay will be a normal delay, right?
<hartytp> thanks rjo.
<hartytp> that all works nicely
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<GitHub119> [smoltcp] podhrmic commented on issue #190: Work in progress - will ping you once I have all your comments implemented. https://github.com/m-labs/smoltcp/pull/190#issuecomment-380961056
<GitHub-m-labs> [artiq] hartytp commented on issue #981: @gkasprow I have shorted pins 1 and 4 of the programming connector and connected pin 3 of T5 to the AMC 3V3 supply via a 1k resistor (using the 3V3 PG LED).... https://github.com/m-labs/artiq/issues/981#issuecomment-380961921
<GitHub-m-labs> [artiq] hartytp commented on issue #981: An mem test is still bad https://pastebin.com/SWsce1wt https://github.com/m-labs/artiq/issues/981#issuecomment-380962200
<GitHub-m-labs> [artiq] hartytp commented on issue #981: @gkasprow I have shorted pins 1 and 4 of the programming connector and connected pin 3 of T5 to the AMC 3V3 supply via a 1k resistor (using the 3V3 PG LED).... https://github.com/m-labs/artiq/issues/981#issuecomment-380961921
<GitHub-m-labs> [artiq] hartytp commented on issue #981: @gkasprow Disabled 2V and 4V rails and mem tests are now fine. https://pastebin.com/70XxRknh... https://github.com/m-labs/artiq/issues/981#issuecomment-380965231
<GitHub-m-labs> [artiq] sbourdeauducq commented on issue #854: @marmeladapk No output by default, use the microscope client.... https://github.com/m-labs/artiq/issues/854#issuecomment-380973822