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<RSpliet>
bbrezillon: does the NFC_SAM bit even exist for you?
<bbrezillon>
RSpliet: what do you mean ?
<bbrezillon>
what are you trying to do ?
<RSpliet>
bbrezillon: long story short: I know absolutely sure my flash chip contains an image with the eGON header... somwhere. So when I can read the header, I know the controller was configured correctly
<RSpliet>
right now I read different information... so I'm trying to verify the parameters one by one
<RSpliet>
SAM (regular vs. EDO) seemed to be incorrect judging by the ctl reg... so I tried setting it using devmem
<RSpliet>
this changed nothing
<RSpliet>
this usually means the bit doesn't exist on this piece of HW... which sounds correct, because the boot0 bootloader seems to set NFC_REG_TIMING_CTL bit 8 if EDO (serial read-out) mode should be used
<RSpliet>
not NFC_SAM (NFC_REG_CTL bit 12)
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<bbrezillon>
RSpliet: what makes you think your NAND should be accessed in EDO mode ?
<RSpliet>
the spec sheet
<RSpliet>
device identifier, byte 6, bit 6
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<RSpliet>
anyway... regardless of whether it should be, sunxi-nand currently seems to do precisely this, it unconditionally sets the NFC_REG_TIMING_CTL bit 8
<RSpliet>
which brings me back to my original question: if ^ that is the bit that controls the serial read out mode, and NFC_SAM is forced to 0 in HW... does that latter bit even exist?
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<bbrezillon>
RSpliet: I don't know, I guess you're right, which mean this driver only works with EDO capable NAND chip :-/
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<RSpliet>
if I find out what's keeping me from reading the right data, I might cook up some patches (... but no promises made, I'm on a tight schedule)
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<bbrezillon>
RSpliet: I doubt this is related to EDO mode
<RSpliet>
it isn't, I tested it :-)
<bbrezillon>
as I said, you need to configure the randomizer and ECC correctly if you want to read the eGON partition
<RSpliet>
to the best of my knowledge I did
<bbrezillon>
and this is why I told you to base you work on my branch
<RSpliet>
I already pulled in your patches
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<bbrezillon>
and you defined the bootloader partition with the appropriate ecc and rnd mode (DT definition)
<bbrezillon>
?
<RSpliet>
1024/40 seed <0x4a80>
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<bbrezillon>
RSpliet: what about the nand-ecc-mode and nand-randomizer-seeds properties ?
<RSpliet>
correct now
<RSpliet>
another silly copy-paste error, hw ecc mode was set to hw_syndrome instead of hw (as in cubietruck define)
<RSpliet>
funny how I always dive way too deep into details, and completely miss these kind of obvious mistakes :-D
<libv>
i do not know why that text got in there in the first place
<NiteHawk>
the LeMaker website still shows pictures with them, and you could also glimpse them in the hardware-libre.fr article. maybe they updated the PCB?
<libv>
was there a version of the pro which had those markers?
<NiteHawk>
i put it there originally...
<libv>
ah, ok, i thought that perhaps this was haphazardly copied from a non pro banana pi device page
<NiteHawk>
nope.
<libv>
NiteHawk: then add that some devices have it and some dont
<NiteHawk>
yeah, that might do.
<libv>
and add an {Edit|Which devices?} to that sentence to mark that we have currently no idea about why this is so
<NiteHawk>
ok, will do so!
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<libv>
thanks :)
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<a1d3s>
NiteHawk, the pictures from my banana pro
<a1d3s>
*are*
<a1d3s>
i have banana pi and m2 here too
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<NiteHawk>
a1d3s: which is perfectly fine, thanks for uploading :) we're just puzzed by the absence of the "BANANA PRO" text on the bottom (which shows on other device pictures from the BPro)
<NiteHawk>
a1d3s: hey, mind if i crop and re-upload a portion of your front side image to display the UART pads?
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<plaes>
rellla: thanks for the "upside-down" change.. I never had balls to do it :)
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<a1d3s>
NiteHawk, do what are needed :)
<NiteHawk>
a1d3s: thanks, that'll help to improve the page (step by step)
<a1d3s>
NiteHawk, if i can help then i do so :)
<a1d3s>
but im not a dev ;)
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<zerotri>
Hello. My name is Wynter Woods and I'm a software developer at Next Thing Company. As is clear from reading some of the logs, several of you are already aware that someone would be coming your way wanting to discuss getting CHIP supported as best as we can. That's my job for the next few months. I've already been contacted by Hans de Goede on the matter but I would also like to have some discussions with some other people in here;
<zerotri>
notably libv.
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<khuey>
zerotri: there's a mailing list you might be more likely to get a response on