sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<sb0> whitequark, with the current rtio::log implementation, the first word contains only one byte (since i == 0, then i % 4 is also 0). is that intended?
<GitHub170> [sinara] marmeladapk pushed 1 new commit to master: https://github.com/m-labs/sinara/commit/b19140b6c447360e9a975b4a148cc658719ce06d
<GitHub170> sinara/master b19140b Paweł: Kasli routing...
<GitHub107> [sinara] marmeladapk tagged production_v1 at proto1: https://github.com/m-labs/sinara/commits/production_v1
<GitHub28> [sinara] marmeladapk tagged proto1 at production_v1: https://github.com/m-labs/sinara/commits/proto1
<GitHub183> [sinara] marmeladapk tagged rev_1.0_production_files at production_v1: https://github.com/m-labs/sinara/commits/rev_1.0_production_files
<sb0> that's some hardcore hardware rework: https://www.youtube.com/watch?v=nap0gtds5tQ
<sb0> cr1901_modern, sure
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<sb0> bunnie, are you Bunnie Huang?
<GitHub106> [artiq] sbourdeauducq commented on pull request #842 c5516a4: those device names could be improved. https://github.com/m-labs/artiq/pull/842#discussion_r147921543
<GitHub101> [artiq] sbourdeauducq commented on pull request #842 c5516a4: That's not going to work. https://github.com/m-labs/artiq/pull/842#discussion_r147926097
<GitHub48> [artiq] sbourdeauducq commented on pull request #842 c5516a4: Shift register + latches are not specific to FMC nor configuring I/O. https://github.com/m-labs/artiq/pull/842#discussion_r147926214
<whitequark> sb0: hm, let me look at rtio_log
<whitequark> sb0: no, unintentional, should be probably fixed
<whitequark> not sure how our tests didn't catch that
<GitHub63> [smoltcp] whitequark commented on pull request #67 3a28298: This code *asks* to be refactored into something like `icmpv4_reply` that would make the `Ipv4Repr` with the given `Icmpv4Repr`, and also have the condition for unicast addresses. https://git.io/vFmsT
<GitHub118> [smoltcp] whitequark commented on pull request #67 3a28298: Just push the entire payload there, up to MTU. It's more useful when debugging networking issues anyway, and it's free for us because we don't allocate. https://git.io/vFmsU
<GitHub75> [smoltcp] whitequark commented on pull request #67 3a28298: `use core::cmp` and then `cmp::min(...)`. https://git.io/vFmsJ
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<key2> hi
<key2> rjo: You've played with zynq and migen, right ?
<GitHub52> [smoltcp] dlrobertson commented on pull request #67 3a28298: 100% agree https://git.io/vFmul
<sb0> whitequark, okay, make it so
<GitHub114> [smoltcp] dlrobertson commented on pull request #67 af41a2d: Updated. https://git.io/vFmPA
<GitHub96> [smoltcp] dlrobertson commented on pull request #67 af41a2d: Updated. https://git.io/vFmPh
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<GitHub61> [artiq] sbourdeauducq commented on pull request #842 436bb28: Why have ``self`` as parameter? https://github.com/m-labs/artiq/pull/842#discussion_r148017763
<GitHub75> [artiq] sbourdeauducq commented on pull request #842 436bb28: This is not clear. It sounds like both J44A and J41 are on the same board. And which "VHDCI board", the FMC/VHDCI or the VHDCI breakout? https://github.com/m-labs/artiq/pull/842#discussion_r148021799
<GitHub37> [artiq] sbourdeauducq pushed 4 new commits to master: https://github.com/m-labs/artiq/compare/cd51bd3980a3...8407b2c400f4
<GitHub37> artiq/master 4deeccb Sebastien Bourdeauducq: coredevice: add shift register driver
<GitHub37> artiq/master d80cf8d Sebastien Bourdeauducq: kc705: add TTLs and shift register driver for FMC DIO
<GitHub37> artiq/master 35fd15d Sebastien Bourdeauducq: DEVELOPER_NOTES: add board lock script
<bb-m-labs> build #871 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/871
<bb-m-labs> build #604 of artiq-win64-test is complete: Warnings [warnings python_unittest] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/604 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<bb-m-labs> build #1757 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1757
<rjo> key2: yes
<key2> with a linux ?
<rjo> yes
<key2> rjo: mmh
<key2> rjo: I generated a simple ledblink that I add in my boot.bif, generate a boot.bin that i place in a sdcard, then when I boot, the led does blink, but u-boot doesn't show up
<key2> if I leave their .bit, uboot does show :/
<key2> you might have a clue ?
<key2> rjo: you have a working repo ?
<rjo> key2: github.com/jordens/redpid
<key2> I didn't see the linux part in it
<shuffle2> i use arch linux on zedboard, i think they use some preexisting uboot
<shuffle2> however it's configured to not load .bit. i prefer it that way since you can easily reload bitstream from linux dynamically
<shuffle2> also i noticed you dont need the byteswap hack (so i guess the kernel is recent enough to have useful fixes)
<key2> shuffle2: how do you load a .bit directly from linux ?
<shuffle2> a xilinx driver exports xdevcfg device
<shuffle2> cat file.bit > /dev/xdevcfg
<key2> aha
<shuffle2> you should also do
<shuffle2> echo 1 > /sys/devices/soc0/amba/f8007000.devcfg/is_partial_bitstream
<key2> before ?
<shuffle2> before writing any bitstream
<key2> ok
<key2> mmh interesting
<key2> shuffle2: you have public repos ?
<shuffle2> no i'm still working on my first thing :) i've been looking at redpid
<GitHub3> [artiq] jordens commented on pull request #842 436bb28: "Name ambiguity due to encoding metadata in the name" strikes again. Nice indication that opaque code names are the way to go and that any approach to make names "intuitive" leads to actual issues with inconsistency, misunderstanding that are way more tangible and hard to relevant than merely complaints *à la* "can't remember the name". https://github.com/m-labs/artiq/pull/842#discussio
<key2> I have /sys/devices/soc0/amba/f8007000.devcfg/ but not is_partial_bitstream
<key2> and I do have /dev/xdevcfg
<rjo> key2: it's the redpitaya tree.
<shuffle2> it probably means your kernel is ancient
<larsc> be aware that xdevcfg is broken in the latest Xilinx kernel
<shuffle2> you could just try to write to xdevcfg. if you need is_partial_bitstream, the failure mode is that writing xdevcfg will halt the arm cores (your linux will die)
<key2> yep it does die
<key2> shuffle2: I was using the linux in the digilent tree
<key2> shuffle2: which linux do you use ?
<shuffle2> i just picked this because it's ready-to-use and easy https://archlinuxarm.org/platforms/armv7/xilinx/zedboard
<key2> shuffle2: what board are you using ?
<key2> I'm on a digilent zynq arty z7-20 bpard
<key2> board
<shuffle2> i'd guess it's probably not too hard to make the above work with any zynq
<key2> shuffle2: so if I get it right, you never recompiled the linux/iboot, you just generate a .bit file with migen and directly write it to /dev/xdevcfg
<key2> correct ?
<shuffle2> yea
<key2> so it looks like my kernel had partial bitstream support
<key2> but the /sys/devices/soc0/amba/f8007000.devcfg/is_partial_bitstream is not there
<key2> ha I found out, the kernel driver was not there :/
<key2> so now, when I flash a bitstream to the /dev/xdevcfg, it does blink, but I lose my hand on the prompt, like it freezes
<shuffle2> need to poke is_partial_bitstream
<key2> I did
<key2> in fact, if I set it to 1
<key2> the .bit I write to it doesnt do anything
<key2> when I just do a cat blinky.bit > /dev/xdevcfg it did blink
<key2> so is there a special way to generate partial bitstream files ?
<shuffle2> i'm not actually using partial bitstreams, it's just that the driver uses that flag to manage power states (at least in my case)
<key2> so what do you use ?
<shuffle2> just the the normal bitstream
<key2> so you generate normal bitstream
<key2> set the is_partial_bitstream to 1
<key2> and cat the normal bitstream
<key2> in a .bit (and not .bin) right ?
<shuffle2> yea
<key2> ha, if I do that it won't even blink
<key2> it only blinks if I leave the is_partial_bitstream
<key2> that's weird
<shuffle2> but on older kernels you supposedly had to byteswap the bitstream? (that's what people seem to refer to as the ".bin")....you could try that i guess
<key2> how do you byteswap ?
<key2> also, if it was the case, why would it blink ?
<key2> ok but why would it blink ?
<key2> if i had to swap
<shuffle2> i have no idea
<key2> it does blink
<key2> it just that i lose my hand on the linux
<shuffle2> i try to deal with it as little as possible
<shuffle2> maybe your xdevcfg is broken in whatever way larsc was referring to ?
<key2> the last commit on xdevcfg is 5hour ago
<key2> i just swapped the bit -> bin using bit2bin from rjo
<key2> and it does not work :/
<key2> ha in fact, when I use the default wrapper, it does not freez
<key2> meaning that the problem is somehow in my ledblink
<key2> so my xdevcfg is not broken !
<GitHub131> [sinara] gkasprow pushed 3 new commits to master: https://github.com/m-labs/sinara/compare/b19140b6c447...128580277c8f
<GitHub131> sinara/master d6b8f44 Greg: fixed #314
<GitHub131> sinara/master 7d40b3c Greg: Merge branch 'master' of https://github.com/m-labs/sinara
<GitHub131> sinara/master 1285802 Greg: fixed #314