<egg|egg>
afaik in Ada you have the attributes given to you by the compiler and that's it
<egg|egg>
(some from the language, some implementation-defined typically)
<rqou>
so T'BASE is a predefined attribute with the following note: This attribute is allowed only as the prefix of the name of another attribute; for example, T'BASE'LEFT."
<rqou>
but none of the other ones have that
<egg|egg>
O_o
<egg|egg>
so 'Base exists in Ada, but that's just a type
<egg|egg>
(and that answers my question, some attributes are types)
<rqou>
it's a type here too
<egg|egg>
but it's usable on its own
<egg|egg>
X : T'Base is a good declaration
<rqou>
aaaargh
<rqou>
that's exactly what i don't want
<egg|egg>
that's not legal in VHDL? but... why :-p
<egg|egg>
so, background so that you understand what this does (in Ada, what the hell is VHDL thinking it's doing anyway). 'Base is "the underlying type"
<rqou>
i am thiiiis close to just saying "f*ck it" and special-casing 'elements
<egg|egg>
and the standard mandates little about it, but 1. it must contain the type (so 1 .. 7), it must contain 0, and it must be symmetrical around 0 (with possibly one more negative value)
<egg|egg>
rqou: array index constraints? in which context?
<egg|egg>
yeah, we encountered it the other day iirc
<rqou>
now what happens when T'Base is an array type? you can give it an index constraint
<rqou>
and this newly-constrained type is indistinguishable from a normal "calling a function that lives in a built-in attribute"
<rqou>
i think i might need to do some refactoring of "name"
<egg|egg>
rqou: prefix of base attribute must be a scalar type, in Ada
<rqou>
VHDL says "Prefix: Any type or subtype T."
<egg|egg>
"the underlying type" isn't a very useful concept for an array
<egg|egg>
welp
<rqou>
and fooarray'elements exists too
<rqou>
i might just say "f*ck it, you cannot parameterize an object this way. you must use a generic"
<rqou>
i might revisit it if i refactor how "name" works
<egg|egg>
back in a bit
<rqou>
hrm, problem
<rqou>
hey armchair laywers: will i have a problem publishing my parser if the repo contains a copy of the VHDL EBNF?
<rqou>
i don't want to have to go through the effort to scrub it
<jn__>
git filter-branch is actually quite easy to use
<jn__>
rqou: are you going to integrate your VHDL parser into yosys?
<rqou>
that's the eventual goal, yes
<jn__>
nice
<rqou>
i haven't even started on semantic analysis, so don't get too excited
<rqou>
yeah worst case i'll just filter-branch out the verbatim copy of the EBNF
<rqou>
stupid ieee copyrights
<egg|egg>
blarg
<rqou>
(says someone who is technically a member of the IEEE)
<egg|egg>
it's probably not ok either to dump copies of the ARM into things, but at least you can stare at it for free, so that's less likely to be the object of daft litigation
<rqou>
yeah ieee standards aren't free either
<egg|egg>
oh, actually This document may be copied, in whole or in part, in any form or by any means, as is or with alterations, provided that (1) alterations are clearly marked as alterations and (2) this copyright notice is included unmodified in any copy. Compiled copies of standard library units and examples need not contain this copyright notice so long as the notice is included in all copies of source code and
<rqou>
egg|egg: i suppose you weren't here for the discussion about (verilog's) vpi_user.h?
<egg|egg>
no?
<egg|egg>
[do I want to know]
<rqou>
it's a normative part of the verilog spec for defining the interface for code to interact with verilog simulators
<rqou>
it's a c header, obviously
<rqou>
but it's also under the ieee copyright
<rqou>
icarus verilog has an (afaik) clean-room reimplementation of it
<rqou>
but that reimplementation is under the copyleft GPL, which is not always desirable
<egg|egg>
aosentudansoetudsath
<rqou>
at this point i believe whitequark can contribute some strong opinions about copyright? :P
<whitequark>
the institution of copyright is unethical and should be destroyed
<rqou>
but it wasn't originally
<rqou>
companies like disney (and tech) made it so
<whitequark>
intellectual property always was
<whitequark>
it was less obviously harmful with smaller terms, sure
<rqou>
what about the original goal of protecting and encouraging creators/inventors?
<egg|egg>
rqou: an annoying side-effect of all this VHDL & Ada talk is that now I keep thinking about language design >_>
<whitequark>
(well, this depends on your definition of "intellectual property". I'm not particularly opposed to, say, trademarks or trade secrets)
<whitequark>
rqou: was it achieved?
<rqou>
for disney it was :P
<rqou>
but overall, not really
<whitequark>
well, no, that's not even the right question
<whitequark>
do you actually know the history of copyright?
<rqou>
vaguely?
<whitequark>
"protecting creators" wasn't the original goal, the original goal of copyright was censorship
<whitequark>
you could maaaaaybe argue that protecting inventors was the original goal of *patents*
<whitequark>
although it's lost on me how encouraging rent-seeking does anyone any good except for, well, rent-seekers
<whitequark>
it's a good time to mention that I don't consider creation or invention an unconditional good
<whitequark>
if you invent something and patent it and therefore prevent someone else from disseminating the same thing freely, it's a net negative
<rqou>
in general i'm much more against patents than a (properly limited) copyright
<rqou>
especially with all the bullshit software patents that have recently appeared
<whitequark>
I'm against anything that restricts what should be human advancement to advancement of bank accounts of a few guys
<whitequark>
this is especially bad with publicly funded research and publicly funded standards bodies, among other things
<whitequark>
but also, fuck xilinx for keeping their software to themselves
<rqou>
especially with the current state of the internet, i'm inclined to agree
<rqou>
e.g. "but i want people to buy my book/game/software" doesn't work so great because they all get instantly pirated
<rqou>
and it turns out that people who would have bought it often still buy it
<rqou>
and people who pirate often wouldn't have bought it anyways
<whitequark>
it's not even that
<whitequark>
the way you *should* respond to piracy is by emphasizing the human cost of it in today's economy
<whitequark>
instead, once you encourage this adversarial relationship, you don't get any sympathy back
<whitequark>
it's really the same problem as entitlement to the time of open-source maintainers
<rqou>
but then this gets into "capitalism is pretty broken"
<rqou>
and that's a much bigger problem :P
<whitequark>
but it's not like the issue of copyrights or patents or rent-seeking in general or the plight of indie artists is separable from the issue capitalism
<whitequark>
of*
<whitequark>
you can't treat them in isolation, and in all likelihood you can't change them in isolation too
scrts has quit [Ping timeout: 240 seconds]
<whitequark>
can you really conceive a rollback of the copyright ratchet under neoliberalism?
scrts has joined ##openfpga
<rqou>
yeah that's probably true
<whitequark>
wtf is up with android buildsystem
<lain>
s/ buildsystem//
<whitequark>
it has "breakfast", "brunch", "lunch", targets "eatme", "omnom" and "bacon"
<lain>
lol
<jn__>
someone was really hungry :D
<rqou>
answer: android sucks :P
<whitequark>
not to mention their release codenames
clifford has joined ##openfpga
<jn__>
has anyone tried tizen instead? :)
<whitequark>
is that still alive?
<egg|egg>
whitequark: what's wrong with the codenames?
<jn__>
o hi clifford
<rqou>
my housemate pointed out an interesting observation: android on a phone (a fully controlled and unchangeable environment) takes longer to boot than a white-box PC
<rqou>
booting windows
<egg|egg>
(Ok, kitkat was really shit, that got a lot of internal backlash, but aside from that)
<whitequark>
egg|egg: food
<egg|egg>
food \o/
<jn__>
whitequark: i'm in the tizen irc channel and the most activity comes from the news bot. i'm not sure how alive it is.
<rqou>
isn't tizen the samsung heap of crap? :P
<whitequark>
rqou: it's interesting (boot times)
<jn__>
rqou: pretty much, i guess
<whitequark>
I think a large part of that is initialization of vendor blobs
<lain>
tizen webpage says it's a Linux Foundation project
<whitequark>
but another part of it is just that phones don't reboot often
<rqou>
they just crash instead? :P
<lain>
^
<whitequark>
hm?
<whitequark>
a PC (not a laptop) would be booted at least once per day, in a typical office setting
<whitequark>
a phone? once per month if you don't let it discharge?
<rqou>
um, not for me?
<lain>
the last N times my android phone has (re)booted, it's been because of a crash
<whitequark>
are you in "a typical office setting" ?
<rqou>
not right now, but even when i was i tended to avoid rebooting
<lain>
my desktop stays on 24/7, my office computer boots when I arrive and shuts down when I leave
<lain>
but yeah, android boot times are shameful
<rqou>
i would usually reboot every monday when i was working
<whitequark>
this is an iphone phone case that runs android
<whitequark>
yes, really
<whitequark>
they went way through their goal too
<lain>
modern windows, and like, sony digital cameras, use a known-good hibernate-style image for fast boot: they do a full clean boot after an update, and then essentially hibernate
<lain>
all future boots, unless you force a full reboot, are just loading that hibernate image
<rqou>
even a clean boot of windows seems to be not slower than booting android
<lain>
yes
<lain>
it's way faster, for sure
<jn__>
meanwhile some linux boxes do a cold boot in about five seconds
<lain>
so does windows, from a full clean boot without the image
<rqou>
even poetteringware boots faster :P
<lain>
and my android phone takes like .. actually I wonder how long it takes
* lain
reboots it
<rqou>
egg|egg: you can clearly tell what era VHDL comes from: "In this standard, the VHPI information model is described using the UML notation."
<egg|egg>
lɒl
<rqou>
VHPI is a C interface btw
<lain>
a friend is learning UML in uni right now
<lain>
even they recognize it's awful :P
<rqou>
so it's manual OO in C
<lain>
vhpi is neat though
<egg|egg>
Rational Software! \o/
<egg|egg>
(phl worked there)
<lain>
verilog has the same thing
<rqou>
VPI doesn't require UML, does it? :P
<rqou>
also, i'm not aware of a single simulator that implements VHPI
<rqou>
even GHDL doesn't
<rqou>
GHDL implements their own thing called AVHPI, which is like VHPI except a) an Ada interface and b) actually OO because of (a)
<rqou>
for bonus points, GHDL _also_ implements VPI
<rqou>
Tristan Gingold seems to be an... interesting person :P
<lain>
so my moto x pure edition ( https://en.wikipedia.org/wiki/Moto_X_Style ) takes 1m20s to reach the launcher or whatever, and it took another minute to finish launching the stuff I have running at boot (Twilight [like f.lux], Pebble smartwatch app, Accuweather)
<lain>
afaik ghdl has vhpi now, some docs are outdated
<rqou>
i wonder how that behaves in a mixed-language simulation?
<bibor>
nope verilog is 0/1/x/z
<bibor>
(bit type)
<rqou>
so what happens to W/L/H?
<bibor>
idk. only way i used verilog is in testbenches for digital stuff
promach has quit [Ping timeout: 256 seconds]
<lain>
you would probably resolve it to 0/1 before then, or something
promach has joined ##openfpga
zino has joined ##openfpga
<rqou>
hrm: "If the attribute designator denotes a predefined attribute, the expression either shall or may appear, depending upon the definition of that attribute (see Clause 16); otherwise, it shall not be present."
<rqou>
so special-casing the builtin stuff seems reasonable
<rqou>
hrm, it's 5am but my sleep schedule is totally shot. what do?
<jn__>
drink beer?
<rqou>
no beer, store's closed
<egg|egg>
coffee?
<rqou>
i hate coffee
<egg|egg>
but how do you produce theorems
<rqou>
i'm not a mathematician :P
<egg|egg>
instead of coffee, cotheorems then?
<egg|egg>
(to produce ffee, like a comathematician)
<egg|egg>
(terrible joke is terrible)
<jn__>
co-ffeorems?
nurelin has quit [Read error: Connection reset by peer]
<bibor>
a guy at our hackerspace made caffeine chocolate. thats a reasonable alternative
<rqou>
i already stayed up all night yesterday while doing the final push getting the parser working
<rqou>
hrm, verilog doesn't have hierarchies the way vhdl does, does it?
<rqou>
from GHDL documentation: "Furthermore, you should not put units in the ieee library. "
<rqou>
hmm i wonder why? :P
<rqou>
so nvc doesn't accept attribute_names in a type_mark either
pie_ has joined ##openfpga
pie_ has quit [Changing host]
pie_ has joined ##openfpga
scrts has joined ##openfpga
<rqou>
wait wtf afl (the fuzzer) is designed by the same guy that does polyurethane resin hacks and micro gearboxes?