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<pointfree> Someone familiar with iCE40 fpgas: If I wrote a huge Boolean expression what's the maximum number of distinct Boolean variables I could fit and use simultaneously and independently on an iCE40 fpga?
<sorear> I don't understand the question
<pointfree> sorear: How many boolean variables could I fit on an iCE40? (where a variable can assume the value 0 or 1) I wouldn't count a 1 output mux as a variable because it can only assume the value of one other variable at a given time.
<sorear> you're not using standard FPGA terminology so it's hard to tell what you actually mean
<sorear> FPGAs do not use "boolean variables"
<pointfree> sorear: I would count a 4 input lut as 4 boolean variables.
<sorear> you're not helping your case
<pointfree> ?
<sgstair> it'd probably be limited to X logic cells used as flip flops buffering the inputs + Y logic cells used as LUT4s for the expression, where X+Y < number of LUT4s in the device
<pointfree> sorear: both fpgas and cplds use Boolean variables regardless of whether they are implemented with plds or luts.
<sgstair> the number of LUTs needed to represent the expression would vary from about 32% of the input count to considerably more for complex interdependent expressions
<awygle> pointfree: off the top of my head, 32K (8K 4-input LUTs)
<sgstair> and given 8k 4-luts, you could produce an expression for xor-all with approximaately 5.3k inputs
<sgstair> more complex expressions (that require subcomponents of more than 4 inputs / don't pack ideally into 4-luts) would start to require more FFs for the expression.
<sgstair> FF/lut components
<pie__> consider CNF or DNF
<pie__> (maybe?)
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<pointfree> considering only UDB bank0 on the PSoC 5LP there are 15 bits for addressing. The most significant bit of bank0 refers to two different areas of fabric. The least significant bit can be used many times within. (15+1)! = 20922789888000
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<qu1j0t3> pointfree: the configuraiton data format seems well documented but perhaps the RE is in the actual config RAM format. no idea yet. i was reading the doc this week
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<azonenberg> pointfree: the max number of bits of state you can have, in theory, is the numer flipflops
<azonenberg> number of*
<azonenberg> trivial example: chain them into a giant shift reg
<azonenberg> The max number of unique signal values you can have is the number of luts plus the number of flipflops plus the number of I/Os
<azonenberg> Realistically you'll never get close to that
<lain> I once turned a xc7a50t into a 65,200 bit shift register
<lain> (every single FF)
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<rqou> offtopic: i just explained to my housemate about the html <map> tag
<rqou> the reply was "the original browser wars were a mistake"
<rqou> apparently despite working at mozilla he had never encountered this feature before
<rqou> also for those a11y people out there, <area>s are in the tab order, including non-rectilinear areas
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<esden> o/ :)
* cr1901_modern spots an esden
<esden> hi cr1901_modern :)
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<qu1j0t3> rqou | the reply was "the original browser wars were a mistake" // the original browser wars were how we achieved standardisation, so not sure I agree :)
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<Bike> world wars were how we achieved the geneva conventions, so they weren't a mistake
<qu1j0t3> <_<
<qu1j0t3> >_>
<qu1j0t3> maybe war wasn't a great metaphor to begin with.
<qu1j0t3> anyway, the modern browser 'wars' gave us fast JS.
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<pointfree> azonenberg: 4 bits are used to refer to a UDB 4!=24 (there are 24 UDBs). Within a UDB 4 bits can be used to address all the literals of the 2 PLDs of that UDB 4! = the 24 input terms of that UDB. The pattern is the same all the way through the routing.
<pointfree> The routing can of course be used to reuse and recombine UDB config in various ways. I used factorial not addition because a bit refers to an area of fabric not a node on a path.
<pointfree> Using a bit in a path does not use it up. You can use it again in another path without sharing through a mux.
<pointfree> 16! or 17! does feel like an outrageous capacity for a CPLD that is supposedly on the smaller end. We could be in for a nice surprise.
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