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<rqou>
whitequark: do you want to work on getting codeexec on SKL/KBL ME and have some "fun"?
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<jn__>
rqou: have you seen this?
<jn__>
02:32 [EFNet] -raphidae`(raphidae@eris.Berkeley.EDU)- For those of you that missed the revelation: EFnet will henceforth be known as "ErisNet" as
<jn__>
eris.Berkeley.EDU has rejoined the network after 28 years, thereby undoing "The Great Split" of 1990.
<jn__>
eris.Berkeley.EDU. Join the Erisian revolution at #eris.Berkeley.EDU :)
<rqou>
O_o
<rqou>
is this april fools?
<rqou>
cc awygle
<jn__>
judging by the date, yes :)
<rqou>
although somebody _did_ mess with the host on the berkeley side
<rqou>
still in the ocf cluster though
<rqou>
i should join it from "that server i have access to"
<jn__>
:D
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<rqou>
anyways, looks like someone with more connections than me stole my idea :P
<azonenberg>
rqou: lol
<azonenberg>
were you gonna join from eris?
<rqou>
i don't have access to that
<rqou>
awygle might
<rqou>
i was going to join from tbp.berkeley.edu
<azonenberg>
what's that?
<azonenberg>
oh
<azonenberg>
tau beta pi
<azonenberg>
?
<rqou>
yeah
<rqou>
awygle: do you have login on the HKN server?
<rqou>
wait
<rqou>
i think they _actually_ did connect the server into the efnet network
<rqou>
it's not just sitting there by itself
<whitequark>
rqou: hmm
<whitequark>
maybe
<whitequark>
what would that entail
<rqou>
you need a way to get raw access to the spi flash
<rqou>
and you need to do a bunch of reverse engineering to figure out *) how to exploit the vuln correctly and *) how to tell when your exploit worked
<whitequark>
raw access to the spi flash
<whitequark>
you mean
<whitequark>
like hook up a few wires to it?
<rqou>
the vuln is disclosed but there's not "one-click" sploit
<rqou>
yes, basically
<whitequark>
the problem is that I'm not super interested in ME codeexec itself
<whitequark>
I'm interested in things like messing with soft straps
<rqou>
i thought ME controlled all of those
<whitequark>
I think PCH straps are in a signed descriptor
<whitequark>
I'm not entirely sure
<whitequark>
it *might* be doable via ME
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<rqou>
yeah, i don't know either
<rqou>
i spent 1 day looking at all this while i was supposed to be studying for finals
<azonenberg>
whitequark: what i'd be MORE interested in would be a full pentest of the ME including a source audit
<rqou>
not quite enough time to build a sploit or gain much knowledge :P
<azonenberg>
i.e. i dont care about being able to run my own code on it
<azonenberg>
as long as i can be confident that nobody else can
<azonenberg>
And that intel's code is trustworthy
<rqou>
anyways, i'm going to join the eris joke channel from tbp and see if they notice
<whitequark>
has anyone been fuzzing the ME command channel?
<rqou>
i think people have
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<cr1901_modern>
>And that intel's code is trustworthy
<cr1901_modern>
/me mail orders azonenberg a box of tinfoil hats :3
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<whitequark>
Intel has repeatedly demonstrated that they're just as shit at writing firmware code as literally every other silicon vendor
<whitequark>
Intel has also repeatedly demonstrated that it ships barely working silicon and actively hides errata (no, I'm not talking about Meltdown/Spectre)
<whitequark>
there's nothing tinfoil hatty about it
<rqou>
hey, look what i got the "erisnet" people to give me:
<rqou>
> rqou__ (~rqou@AWESOME-UNIVERSITY-WE-LOVE-BSD-TNX.eris.Berkeley.EDU) has joined
<rqou>
you now get a special cloak if you connect from a berkeley ip
<rqou>
cc jn__ awygle
<awygle>
rqou: lol
<awygle>
i might still have an hkn login, haven't checked in years
<awygle>
i used to partially run that server though so i might
<cr1901_modern>
"barely working silicon" Well considering Intel engineers themselves don't even know why their CPUs work anymore...
<cr1901_modern>
(citation needed, don't have the link to the presentation handy)
<awygle>
whitequark: in your mpsse testbench, was there a reason you're doing for _ in range(32)? specifically the 32
<rqou>
awygle: knowing them HKN never deletes logins :P
<awygle>
rqou: knowing them the _server_ may not have lasted that long :P
<rqou>
hmm true
<rqou>
they were migrating stuff a while back
<awygle>
the real question is if i still have sudo
<whitequark>
oh, no particular reason, it's to see what the device is up to in gtkwave when it fails the test
<whitequark>
i.e. just to provide context for ~32 cycles after the failure
<awygle>
does it make sense that that call starts to time out if i change the clock divider? it seems to make sense to me
<whitequark>
hmm
<whitequark>
so if you've loaded some data and it's shifting out, the core won't acknowledge any new write
<whitequark>
so, yes
<awygle>
cool. i'll make that an optional parameter of the read() call then. thanks
<awygle>
actually do i need to do that for write and _wait_for_tck also?
<whitequark>
I would go a different way
<whitequark>
add a field to the testbench that multiplies expected latency
<whitequark>
range(32 * self._latency) etc
<awygle>
yeah that makes sense
<rqou>
btw awygle i just looked a bit
<rqou>
you're right the hkn server might be gone
<rqou>
it's in OCF now
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<azonenberg>
Holy moley there really is a MLCC shortage
<azonenberg>
i'm trying to find a 100 uF 1206 cap and my usual parts are all sold out at digikey
<rqou>
didn't someone post in here that there's currently a global shortage?
<rqou>
or did i hear that from bird website or IRL?
<azonenberg>
yeah i had been hearing about it for a while
<azonenberg>
this is my first time actually having trouble sourcing parts
<rqou>
what about the ddr4 shortage or the gpu shortage? :P
<azonenberg>
yeeesh
<azonenberg>
add to my cart
<azonenberg>
and it says "contact digikey" for lead time
<azonenberg>
i.e. they probably dont even have any on order
<cr1901_modern>
Everything's unsustainable, news at 11
<cr1901_modern>
I'm depressed, but not surprised that things are going so badly all over.
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<azonenberg>
Mouser, meanwhile
<azonenberg>
lists a quarter million of one Murata part on order
<azonenberg>
... shipping in September 2018
<cr1901_modern>
azonenberg: I'm did a skim but the tldr for mlcc shortages seem to be that manufacturers are trying to make the layers thinner and they've reached physical limits where the yields begin sucking?
<azonenberg>
i thought it was just rising demand and factories not keeping up
<cr1901_modern>
Might be. :/
<cr1901_modern>
I'm more concerned about DDR4 prices being permanently doubled
<whitequark>
awygle: hm let me take a look at it myself
<awygle>
whitequark: thanks
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<azonenberg>
cr1901_modern: 1206 sized 100 uF caps apparently are nonexistent right now
<azonenberg>
i noticed my lab was low
<azonenberg>
tried to restock
<azonenberg>
NOPE
<whitequark>
... 1206 sized 100 uF caps?
<whitequark>
you sure that's a "u"?
<azonenberg>
Yes, i am certain
<whitequark>
those exist?
<azonenberg>
6.3V MLCCs
<azonenberg>
very commonly used for decoupling FPGA Vcore rails etc
<azonenberg>
Normally i use 1210s but here and there I'm willing to pay the premium for 1206 to fit in a slightly tighter space
<azonenberg>
You can even get them in 0805, but the C/V curves go down the toilet beyond a volt or so
<azonenberg>
the 1206-1210 sized ones are only down 20-30% at 3.3V
<rqou>
why not tantalum instead? :P
<azonenberg>
rqou: you know perfectly well why not
<azonenberg>
i do not use wet electrolytics or tantalums anywhere in my designs
<azonenberg>
MLCC or solid polymer electrolytic
<cr1901_modern>
ESL!!11one
<azonenberg>
cr1901_modern: esl for which?
<cr1901_modern>
tantalum
<azonenberg>
lol yes, MLCCs are super low L
<cr1901_modern>
I don't actually know why you don't use tantalums; that was my guess
<azonenberg>
that plus their... energetic... failure omdes
<azonenberg>
modes*
<cr1901_modern>
If there's one thing to learn about capacitors, it's that: "capacitors actually hate being capacitors"
<azonenberg>
plus i dont like polarized caps if i can avoid them in general
<azonenberg>
i use solid polymer if i have no choice (i.e. no MLCC available in the density i need)
<azonenberg>
whitequark: one time i used a 330 uF MLCC, i think 1812 package, on a kintex-7 vcore rail
<cr1901_modern>
They will do everything in their power to _not_ be capacitors, from losing 50% their capacitance if they ever see a continuous DC bias for more than 2 seconds, to becoming inductors if you feed them the wrong frequency range
<azonenberg>
lol
<azonenberg>
yeah
<azonenberg>
this is why i like samsung MLCCs
<azonenberg>
they have really nice, easily readable C/V curves
<azonenberg>
most are even linked on the digikey pages
<cr1901_modern>
I exaggerate, but they're not fun components to deal w/
<azonenberg>
if you want to get design wins, this is how you do it
<cr1901_modern>
But they're in short supply now :(
<rqou>
azonenberg: you're obviously not being a very good oldschool analog designer carefully relying on parasitics for your design to work :P
<azonenberg>
lol
<cr1901_modern>
I think we've established that azonenberg despises analog
<azonenberg>
analog is, for the most part, a necessary evil to me
<azonenberg>
Basically i do analog to debug digital signals that don't feel like being digital (finite rise time, transmission line effects, etc)
<azonenberg>
and that's about it
<awygle>
i like analog but you should never be in a situation that is so analog flux messes it up
<cr1901_modern>
I hate when ppl rely on parasitics.
<whitequark>
awygle: done
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<awygle>
whitequark: ahhh ok
<awygle>
thanks
<awygle>
whitequark: i'm finishing up the last two commands from the list you gave me two weeks ago, do you have a "next step" you want to pass me?
<whitequark>
hmm!
<whitequark>
so the major parts that are left are: bringup of the CY7C68013A, bitstream download capability, FIFO connecting CY7C with the MPSSE engine, and the board design
<whitequark>
I want to write the bitstream download code and I've done most of the bringup in any case
<whitequark>
the board design is more important, I think, it's a huge mess to use the the CY7C and iCE40 devboards
<whitequark>
so let's collaborate on that?
<whitequark>
kicad recently got the CY7C68013A footprint.
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<whitequark>
I actually made and submitted it but someone else simultaneously did that so it got merged over mine т_т
<rqou>
you trust the kicad footprints?
<whitequark>
hmm their requirements are quite stringent
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<rqou>
their 0402 footprints are kinda f*cked
<whitequark>
so let's fix them?
<whitequark>
I mean
<whitequark>
let's not use 0420
<whitequark>
*0402
<whitequark>
but also fix them
<rqou>
what's wrong with 0402?
<whitequark>
it's fucking tiny that's what
<awygle>
rqou: what's specifically wrong with the 0402 kicad footprints?
* whitequark
doesn't hand-solder anything smaller than 0805
<rqou>
the pads seem to be smaller than they should be, and the soldermask opening is larger than they should be
<cr1901_modern>
might be related to kicad footprints not being IPC compliant
<cr1901_modern>
(not that I blame them b/c good lord that spec is painful to read)
<rqou>
i mean, the component still fits on the pad
<rqou>
so it's "ok"
<whitequark>
rqou: wait, are you talking about the kicad 5 libraries? or the old ones?
<rqou>
idk which ones
<cr1901_modern>
azonenberg: How did you ever find the motivation to fix that for your libs?
<whitequark>
the old ones were just basically whatever
<whitequark>
the kicad 5 libraries are far higher quality IME
<whitequark>
awygle: so, I think mainly what's missing is the iCE40UP5K footprint
<rqou>
i mean, the parts still fit
<rqou>
so it's not "wrong"
<whitequark>
personally, I would make it and get it accepted into kicad libraries first
<azonenberg>
whitequark: lol i use 0402 by default, 0201 if i need small spaces
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<azonenberg>
i mostly reflow but am able to comfortably solder 0402 when needed
<azonenberg>
whitequark: and i do not use the kicad footprints whatsoever
<whitequark>
azonenberg: back when I had hand tremors from anticholinergics, I couldn't solder together two 1.5mm wires
<awygle>
whitequark: there's at least a few dev boards out there for that, we could lift e.g. daveshah's footprint?
<azonenberg>
i use 100% my own board proven / triple verified
<awygle>
pushing upstream is always good, of course
<rqou>
also, ime i don't use 100% ipc compliant footprints
<rqou>
some of them are "hand-soldering optimized"
<awygle>
and of course double checking
<awygle>
rqou: there's 3 versions of most IPC footprints for exactly that reason
<rqou>
i've been told historically to _never_ trust vendor footprints
<whitequark>
azonenberg: I want to see a world where kicad footprints can be trusted, so what I do is verify them and make sure they are fixed upstream if they aren't right
<rqou>
i personally trust azonenberg to get it right
<whitequark>
I'm really tired of this situation where it's acceptable for everyone to have their NIH footprints
<whitequark>
fuck that
<rqou>
also, some of my footprints have "extra" features e.g. on the docs layer
<whitequark>
if improving kicad footprints means that my board needs a respin, my board will have a respin
<cr1901_modern>
whitequark: Are you doing macrofab to make the board or do you have a reflow oven?
<cr1901_modern>
s/macrofab/whatever equivalent/
<whitequark>
cr1901_modern: I have a frying pan
<rqou>
this sounds nice in theory, but i don't want to deal with bikesheds
<whitequark>
and an IR probe
<rqou>
it's so much easier to just make libs fit my style/needs
<whitequark>
rqou: I don't want to deal with bikesheds
<whitequark>
that's precisely why I use vendor libraries
<cr1901_modern>
electric frying pan? Or are you gonna cook on the stove :D?
<whitequark>
cr1901_modern: the latter
<whitequark>
I mean
<whitequark>
that's an upgrade from doing reflow with a blowtorch
<cr1901_modern>
Interesting... curious how it turns out
<whitequark>
which I've also done
<whitequark>
successfully, of course
<awygle>
my utopia is a standard data format for the relevant parameters and everybody can script their own design rules. but i agree with whitequark that the waste of effort involved in the current footprint situation is disgusting.
<cr1901_modern>
That sounds... like a small room for error
<awygle>
depends on your stove
<awygle>
it's pretty easy on an electric range
<cr1901_modern>
I meant a blowtorch
<awygle>
gas i would be nervous about
<whitequark>
actually, it's surprisingly easy if you're good with a blowtorch
<whitequark>
I'm good with a blowtorch.
<awygle>
oh, yeah, that's a whitequark special lol
* awygle
is not good with a blowtorch
<cr1901_modern>
I don't have a blowtorch
<whitequark>
get a bernzomatic one and MAPP gas
<cr1901_modern>
But what you hold it parallel to the board a few inches away?
<whitequark>
if you hold it parallel to the board you'll just blow everything away
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<cr1901_modern>
Is a frying pan good for components on both sides?
<azonenberg>
whitequark: yeah my current footprints are functional but not 100% ipc compliant
<awygle>
cr1901_modern: i wouldn't do that
<azonenberg>
cr1901_modern: no, in fact this is one of the big reasons i dislike the technique
<awygle>
although i suspect it can be made to work
<azonenberg>
basically all of my designs are very dense 2 sided
<azonenberg>
So i use a toaster oven
<azonenberg>
they're cheap
<cr1901_modern>
I'm not about to try, but a blowtorch may be advantageous for that
<azonenberg>
how much is a blowtorch?
<cr1901_modern>
azonenberg: Right, and I'll go that route too
<whitequark>
how much what?
<azonenberg>
i forget what i spent on mine
<azonenberg>
whitequark: $$$
<azonenberg>
but my toaster oven was like $60 at walmart and that was a fancy convection model
<azonenberg>
a baseline one is a lot less, just not as suitable for big boards
<cr1901_modern>
azonenberg: However, unlike you I don't have an innate ability to know when the board's done, so I'll need a kit to convert it to a reflow oven
<azonenberg>
cr1901_modern: it's not an innate ability, lol
<azonenberg>
you just look at the paste
<azonenberg>
when it goes from gray to silver it's melted
<azonenberg>
keep watching until you dont see any gray left
<cr1901_modern>
Maybe not, but I suspect I'll screw it up anyway. And I want to spend the least amount of money in the long run
<azonenberg>
give it another 15 seconds or so after that
<azonenberg>
and it's done
<cr1901_modern>
And you've done BGAs w/ this?
<awygle>
i am about to drop ~300$ on a controleo 3
<cr1901_modern>
awygle: Same
<azonenberg>
So far i've done... three artix7 FTG256 and a flip-chip kintex7 (FBG484)
<azonenberg>
plus a bunch of spartan6s and smaller CPLDs etc
<awygle>
but my current toaster oven is just a black and decker from target
<awygle>
and i've done BGAs
<awygle>
and WLCSPs
<cr1901_modern>
awygle: Need to make clear I don't _want_ to drop $300 on it
<azonenberg>
using a... proctor-silex? from walmart
<awygle>
i've also set a board on fire, though
<azonenberg>
the process recipe is "cookies"
<awygle>
like actual fire
<azonenberg>
set temp to 450F, cook until paste turns silver
<azonenberg>
wait 15 sec, turn off, wait 15 sec, open door
<azonenberg>
pretty simple process and has yet to fail me
<cr1901_modern>
azonenberg: What's your exact model?
<awygle>
burning fr4 (or FR2 which is what i suspect it was) smells very bad
<azonenberg>
cr1901_modern: gimme a sec to find a pic?
<cr1901_modern>
Sure
<cr1901_modern>
I'm willing to risk $60 for a toaster oven that might now work (Controleo uses a different oven)
<cr1901_modern>
not*
<whitequark>
wat
<whitequark>
how can a toaster oven 'not work'
<cr1901_modern>
whitequark: Because I'm assuming everything can and will go wrong even if I dup azonenberg's setup
<awygle>
i mean, the toaster oven will work assuming it can get hot enough. you just have to be fast/attentive enough to not let the board catch fire.
<azonenberg>
cr1901_modern: remind me after work tomorrow
<azonenberg>
i'll be in the garage
<awygle>
i am willing to trade 300$ for a robot to be attentive for me.
<azonenberg>
dont have the pic handy
<cr1901_modern>
azonenberg: Ack
<awygle>
last year, i wasn't
<azonenberg>
awygle: see, my oven isnt capable of overheating the board
<azonenberg>
the peak temp right now is around 230C, my problem is that it barely gets hot *enough*
<cr1901_modern>
whitequark: If I'm not able to dup azonenberg's setup, then I will have to modify that oven w/ a kit (I'm on my own), or buy the oven associate w/ that kit (which has informative directions) >>
<cr1901_modern>
That said, most toaster ovens look the same so
<azonenberg>
But this also makes it *very* forgiving
<azonenberg>
cr1901_modern: the big thing to look for is forced air convection
<cr1901_modern>
I prob could make it work
<azonenberg>
the ones that just have a heating element on top, and no fan, basically rely entirely on IR to heat
<azonenberg>
and you get much less uniform heating
<azonenberg>
Mine is intended for small frozen pizzas, its decently sized
<azonenberg>
and it has two elements each top and bottom
<azonenberg>
with the tray blocking IR to the bottom, you get convection heating of the whole board plus IR giving it a little kick from the top
<cr1901_modern>
That sounds like an oven meant for bigger boards
<cr1901_modern>
bigger workloads*
<azonenberg>
The bigger it is, the more uniform your heating will be in general
<azonenberg>
My old one was a tiny countertop one that could barely fit two slices of bread
<azonenberg>
one element each top and bottom
<azonenberg>
it had a hot zone right under that element and it got rapidly cooler towards the front and back
<azonenberg>
doing long skinny boards was awesome
<azonenberg>
anything larger in that dimension would barely reflow while the middle was charring
<azonenberg>
This one is SUPER uniform, i have maybe 10 sec max in which part of the board is melted and the rest isn't
<azonenberg>
and this is for like a 4" square board with a BGA, SMA connectors, etc
<azonenberg>
When you hear the thermostat click off, that's your cue the board is just about done
<cr1901_modern>
Only posting this for your response
<azonenberg>
Since there's a little bit of lag between the air temp and pcb temp
* cr1901_modern
nods
<azonenberg>
but the ramp rate is slow enough that the lag is only a couple degrees
<azonenberg>
So when the air hits 230C, the board is right around 220
<azonenberg>
SAC305 melts at 219
<azonenberg>
i give it another few sec to let it get solidly above melting temp and give chips time to self-align, then cool
<azonenberg>
this is not ideal, the recommended process window for SAC305 has 230 right around the BOTTOM edge of tolerance for peak temp
<azonenberg>
But i cant go any hotter w/o modding the oven controller
<azonenberg>
And so far i have not had yield issues from it
<cr1901_modern>
oh you do _lead free_ w/ this setup?
<azonenberg>
Yes
<azonenberg>
This same oven would have zero trouble doing SnPb paste
<azonenberg>
For SAC, it's barely hot enough but works
<cr1901_modern>
Well, lead free appeals to me
<cr1901_modern>
azonenberg: So, my plan was to do BML's Spartan 7 board. Despite your concerns, it looks like he got it to work.
<azonenberg>
I use SAC305 for everything because xilinx uses that as the alloy for all their BGAs
<cr1901_modern>
Ahh
<azonenberg>
I dont dispute that it can be made to work,. i just think he's not following best practices and yield is likely to be less good than using my techniques
<azonenberg>
my bigger concerns are his lack of using proper eda software making bugs much more likely (does the thing he's using even have DRC?)
<cr1901_modern>
Right, I just want to see that I can create a board that's "known to work" before I do my own
<azonenberg>
also, i should check digikey
<azonenberg>
i didnt think most spartan7s were GA yet
<cr1901_modern>
azonenberg: Also, IIRC you can't do 0.4mm pitch w/ your oven, correct?
<cr1901_modern>
50 and 25 are avail
<azonenberg>
ah ok so not the tiny ones yet
<azonenberg>
those were the ones i mostly wanted
<azonenberg>
for anything nontrivial in size i'd rather have an artix
<azonenberg>
cr1901_modern: the oven is not the limiting factor in pitch
<azonenberg>
it's a clean paste print and appropriate PCB design rules
<cr1901_modern>
paste print?
<awygle>
cr1901_modern: applying the paste with the stencil
<azonenberg>
Your solder paste needs to be properly applied
<cr1901_modern>
Ahhh, well I need to buy one of those squeegees I guess
<azonenberg>
The smallest pitch stuff i've done in this oven were 0.4mm STQFN-20 (greenpak) on an oshpark PCB
<awygle>
the _real_ limiting factor is the board house imo
<awygle>
i wouldn't even try to use paste on a 0.4mm bga
<azonenberg>
and 0.35mm WLCSP, on a Multech board
<azonenberg>
awygle: i've done so, with good results - you need a good steel stencil though
<awygle>
i'll report my success with my new fpga board in ~2 weeks when it comes back from oshpark
<cr1901_modern>
awygle: I wouldn't use oshpark for 0.4mm pitch bga
<azonenberg>
cr1901_modern: if you order from oshstencils
<cr1901_modern>
That was my plan
<azonenberg>
you get a free "credit card" paste spreader with every order
<awygle>
cr1901_modern: i am cheap, and this is purely a dev board for working on icestorm support
<azonenberg>
little plastic squeegee
<azonenberg>
basically a CC minus magstripe
* awygle
hates that squeegee
<azonenberg>
awygle: it's worked for everything i've used it for
<awygle>
buy stainless stencils, they are waaaaaaay better than kapton
<cr1901_modern>
azonenberg: Is that good enough to do those aforementioned 0.4mm boards?
<azonenberg>
if i was doing high volume or big boards i'd get a framed stencil and a proper metal squeegee
<cr1901_modern>
Ahh you said yes
<azonenberg>
awygle: oshstencils does stainless now
<awygle>
azonenberg: i nokw
<awygle>
... know
<cr1901_modern>
In any case, that's good to know
<azonenberg>
i wont touch kapton anymore
<awygle>
i just meant "buy those, don't cheap out"
<cr1901_modern>
re: the credit card squeegee
<cr1901_modern>
makes my life a bit easier
<awygle>
i find i produce a lot of wastage with the credit card squeegee is all
<awygle>
it _works_ it just seems inelegant
<cr1901_modern>
azonenberg: Well I actually have money set aside for this for once, so I'll do some reflow oven tests soon
<cr1901_modern>
Then I can worry about doing my own BGA boards
<cr1901_modern>
awygle: i wouldn't even try to use paste on a 0.4mm bga <-- then what would you use?
<azonenberg>
cr1901_modern: just smear flux on the board with a swab then reflow the bga
<azonenberg>
This is an acceptable process, and is commonly used if you're hand soldering the rest of a board then putting one or two bgas on
<azonenberg>
it's not widely used in industry because dispensing flux is an extra process step
<azonenberg>
and if you're printing paste that's good enough to have sufficient flux
<azonenberg>
Roughly speaking overall yield for the two processes is comparable, the flux-only process has a higher %age of opens and the paste process has a higher %age of shorts
<cr1901_modern>
azonenberg: Will tacky flux work? That's what I have on hand
<awygle>
yes
<cr1901_modern>
I bought it at Radio Smack back when that still existed. Has served me well
<awygle>
and i tend to have a heavy hand with the paste / not tweak my stencil properly ahead of time, so i find the flux method gives _me_ better results
<azonenberg>
cr1901_modern: that's what i *prefer* actually
<azonenberg>
For general fluxing purposes
<cr1901_modern>
I need a better brush for it tho
<cr1901_modern>
paintbrush is too thin
<azonenberg>
I use puritan #3130 lint-free swabs
<azonenberg>
for this, as well as general cleaning purposes (defluxing boards etc)
<cr1901_modern>
oooh these are cool
<azonenberg>
I buy them by the case of a thousand, you get a slightly better price that way
<azonenberg>
last time i checked Harmony Cleanroom (harmonycr.com) had the best deal
<azonenberg>
i get my lint-free woven cloth wipes from them too
<cr1901_modern>
I can do all other smd parts by hand just fine probably (as long as they are 0402 or above.)
<rqou>
wait whitequark are you in HK? with the cats?
<awygle>
i need a good acid-free brush, and also some lint-free swabs. tired of using nail swabs.
* awygle
misses alpha wipes
<whitequark>
rqou: nope
<azonenberg>
awygle: puritan #3130
<whitequark>
not with the cats
<azonenberg>
best i've found for swabbing things
<azonenberg>
they're around 12 cents a pop so not cheap but TOTALLY worth it
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<rqou>
ah, so the picture from birdsite is from before?
<azonenberg>
i ordered a case for the lab at work too, they were using q-tips
<azonenberg>
awygle: re wipes, gimme a sec to find you the part number i use
<whitequark>
I need to sleep now, but let's discuss the board in a bit
<awygle>
yeah i have to sleep too
<awygle>
ping me tomorrow when you're free
<whitequark>
kk!
<awygle>
i'm not working again until thursday
<azonenberg>
awygle: $38 / $55 per 600 wipes, 4x4"
<azonenberg>
depending on if you need esd safe or not
<azonenberg>
that's a drop in the bucket for anyone doing nontrivial PCB work
<azonenberg>
there's no excuse to not use them
<awygle>
azonenberg: sweet, i'll dig them up in the log when i next do nontrivial pcb work :p
<awygle>
i think i'm almost out of my box of kimwipes anyway
<cr1901_modern>
why do I need wipes?
<awygle>
de-fluxing boards is what i use them for mostly. also just like... general cleaning of things.
* awygle
likes a clean workspace
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<azonenberg>
cr1901_modern: I mostly use them for cleaning flux off things, also for removing sanding residue when i remove mousebites from oshpark boards
<awygle>
oh yeah good one
<azonenberg>
they're overkill for bench cleaning but i have been known to use them for that
<cr1901_modern>
what's this "defluxing" procedure you speak of?
<cr1901_modern>
:P
<azonenberg>
They work nicely for cleaning my .22 after target practice too :p
<azonenberg>
they arent soluble in gunpowder solvents
<awygle>
i've been ruined by sensitive analog circuits to not trust 'no-clean' flux
<azonenberg>
awygle: i mostly just dont like touching sticky boards, and it looks ugly especially when it collects dirt
<awygle>
also, it's ugly :p
<azonenberg>
i'm actually considering getting an ultrasonic tank at my new place for board cleaning
<awygle>
azonenberg: put me on the mailing list for your results
<azonenberg>
will have to evaluate components more carefully, that was never a design consideration for me in the past
<azonenberg>
i know mems normally doesnt like it
<awygle>
i have been thinking about getting one, but haven't pulled the trigger because i don't know anyone who has one
<awygle>
okay, goodnight everyone
<azonenberg>
i know several people who have them, just not for pcb purposes
<cr1901_modern>
I guess I should go to bed soon as well...
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<pie___>
is there such a thing as schematic capture for 3d stuff where i make an isometric drawing or something and then trace the points and get a 3d model out
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<qu1j0t3>
isn't sketchup a bit like that?
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<pie___>
tfw you cant figure out what to do with shit so you just shove it in boxes
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<awygle>
don't basically all 3d modeling tools work that way?
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<pie___>
not...exactly
<pie___>
actually
<pie___>
maybe i guess
<pie___>
depends on how the tools work but youre probably right
<pie___>
rqou, that "idk what to do with all this crap so im putting it in a box" moment
<pie___>
oh wait i already said that
<pie___>
well, im doing it repeatedly today
<awygle>
Lol
<awygle>
Maybe you should get rid of some crap?
<pie___>
today, on Hoarders
<pie___>
pretty sure i found a lifetimesworth of stickynote
<pie___>
-s
<pie___>
people need to stop giving me office supplies i dont use
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<azonenberg_work>
pie___: lol
<azonenberg_work>
i am going to throw out so much stuff after i moev
<azonenberg_work>
move*
<azonenberg_work>
yes, i said after
<azonenberg_work>
i need to GTFO of this house asap
<azonenberg_work>
So i'm gonna box everything up indiscriminately then sort it out as i unbox
<awygle>
I am in the process of getting rid of a ton of stuff
<awygle>
The problem is that I have medical bills so I can't afford to replace things that kind of work right now
<awygle>
Soon (TM)
<azonenberg_work>
i dont mean replacing things
<azonenberg_work>
i mean throwing away garbage and stuff i dont use whatsoeevr
* awygle
eyes odometer with 200k miles on it
<azonenberg_work>
or that's just so obsolete there's no point in keeping it
<awygle>
That I'm doing right now
* azonenberg_work
eyes geforce 9800 card
<awygle>
But I have a bunch of marginal stuff that needs replacing. Blankets with holes, things like that.
<azonenberg_work>
yeah i have a bunch of stuff like that to upgrade too
<azonenberg_work>
but i'm also in the middle of a remodel and trying to scrape together $16K for a new roof so my new walls and ceilings don't get all soggy from leaks
<azonenberg_work>
sooo... priorities :p
<awygle>
Yup
<azonenberg_work>
the bathroom and kitchen remodels are more cosmetic than "needs to be fixed to make the place livable" so those are tabled for a while
<azonenberg_work>
there's minor issues, like water leaking out around the sink spout when the faucet is on, but i can live with that for a while
<qu1j0t3>
azonenberg_work: you could auction off mystery boxes
<azonenberg_work>
qu1j0t3: lol
<azonenberg_work>
i need to figure out what i'm keeping first
<azonenberg_work>
Then figure out what to do with the stuff i'm not
<awygle>
I need to sell all this medical equipment now that I can walk. Crutches, boot, scooter.
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<qu1j0t3>
kind of like it would be more efficient for a hospital to loan that stuff temporarily.
<qu1j0t3>
(for free, of course)
<awygle>
🐸☕
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<awygle>
Has anyone done any work on the Ultra or UltraLite ice40s?
<awygle>
I'm going to guess "no" because the dev boards are 60$ and the UPduino is 10$ (even if crappy)
<awygle>
daveshah maybe?
<pie___>
found two more pencil sharpeners and i think we're up to 7
<daveshah>
awygle: I added the ability to pack and unpack an Ultra bitstream to icepack, but the device data needs to be added to icebox and its IP (I2C, SPI and LED drivers are different) documented to get bitstream gen going
<daveshah>
I don't have time to do that in the foreseeable future but I'm happy to help someone else along the way
<daveshah>
UltraLite should be very easy as it's closer to an UltraPlus than the Ultra is.
<awygle>
daveshah: thanks for the update. I have an LM dev board coming in a couple weeks, so I'll probably ask you for help then. I might move on to ultra and UltraLite afterwards depending on life
<daveshah>
awygle: the LM is interesting as the fabric looks identical to the old LP/HX parts, so that side should be easy
<daveshah>
The hard IP looks to be connected to the fabric through IO tiles, as if it was an external device
<daveshah>
So the core modifications needed should be small to none - no new tile types
<daveshah>
Any work on adding devices would be much appreciated :)
<cr1901_modern>
>azonenberg_work: there's minor issues, like water leaking out around the sink spout when the faucet is on
<cr1901_modern>
This reminds me of a documentary (for lack of better term) I watched on real estate agents. Basically, _no_ house put up for sale ever satisfies all regulations it's legally supposed to.
<cr1901_modern>
But comparatively minor things don't get fixed
<azonenberg_work>
cr1901_modern: of course
<azonenberg_work>
the inspector found a whole slew of issues
<azonenberg_work>
Most of which i didnt care about because they covered things like the garage doors that were being removed
<cr1901_modern>
None of them dealbreakers, apparently :)
<cr1901_modern>
ahhh
<balrog>
as long as there's no termites or something else as bad :)
<azonenberg_work>
yeah the federal pacific breaker panel was enough for me to bargain the price down
<azonenberg_work>
balrog: the bones are solid
<azonenberg_work>
the framing is one of the main things i'm keeping :p
<azonenberg_work>
and the hvac and plumbing, that all looks good too
<cr1901_modern>
interesting, now I'm going down a rabbit hole on circuit breaker panels
<azonenberg_work>
well ok some of the hvac ducts need to get re-hung
<azonenberg_work>
but the ducts themselves are fine
<azonenberg_work>
Just not supported right
<azonenberg_work>
cr1901_modern: i have a nice shiny new cutler-hammer now
<azonenberg_work>
literally everything past the meter is / will be new by the time i'm done
<awygle>
azonenberg_work: two questions - what's your fancy board house called, and what should i do about my laser printer causing the lights in my office to flicker?
<azonenberg_work>
awygle: multech
<cr1901_modern>
Oh God!
<cr1901_modern>
>a New Jersey court later ruled that FPE committed testing fraud and a cover-up, labeling the breakers as meeting the standards set by the UL when in reality, they were defective.
<azonenberg_work>
second, that's probably just the current surge from the printer kicking on
<azonenberg_work>
the fuser uses a lot of power
<azonenberg_work>
its no different from a fridge or vacuum cleaner etc
<azonenberg_work>
the only real solution is to get lights with proper power supplies that have input caps and can ride out a brief glitch
<azonenberg_work>
modern LED fixtures should be fine
<azonenberg_work>
putting the light on a separate circuit from the printer may help too
<azonenberg_work>
awygle: they're definitely a chinese company
<azonenberg_work>
they've sent me QA reports with a "created with trial version of blah pdf creator" watermarks
<azonenberg_work>
but the boards are solid :p
<awygle>
i mean the breaker's not tripping, and the lights just flicker not die
<azonenberg_work>
Yeah its an instantaneous load
<awygle>
so i guess it's fine
<azonenberg_work>
probably inductive kick from the dV/dt
<awygle>
even though it flickers continuously while printing
<azonenberg_work>
now that is more concerning
<azonenberg_work>
have you stuck a DVM on an outlet while it's printing?
<awygle>
no
<azonenberg_work>
conjecture: local brownout b/c long run of light-gauge wire
<awygle>
i may hunt around for an outlet on its own circuit, or a lightly loaded one
<awygle>
printer has wifi, no reason it _has_ to be in the office with e.g. the PC
<awygle>
azonenberg_work: so how do i order from these people? just email gerbers to multech@mutlech? :P
<cr1901_modern>
mutlech
<azonenberg_work>
awygle: send an initial inquiry/RFQ to that email, they'll assign you a sales rep
<azonenberg_work>
then you go through them from there on out
<awygle>
so like a "real" board company then :p
<azonenberg_work>
Yeah
<azonenberg_work>
There's no instant quote but most of the sales reps have skype and will quote while you wait if it's not too crazy specs
<awygle>
ugh i hope i don't get the "sorry you're not a company" song and dance.
<azonenberg_work>
the one other thing to be aware of is that they normally want payment by wire transfer
<azonenberg_work>
i dont think they take USD credit cards
<awygle>
hm. no reason i can't do that, although kind of a PITA
<azonenberg_work>
they do great QA though
<azonenberg_work>
complete with an epoxy-embedded cross section + solderability test specimen
<azonenberg_work>
on every order, even 2-layer
<cr1901_modern>
sounds expensive if they want a wire xfer
<awygle>
Nice
<azonenberg_work>
cr1901_modern: my TDR board was 4 layer 100 x 160 mm, i think 100/100 um (4/4 mil) design rules
<azonenberg_work>
ENIG, blue soldermask, controlled impedance, filled via-in-pad
<awygle>
I'm used to space industry pearl clutching about American companies so I've never gotten non-trivial boards fabbed in China
<azonenberg_work>
somewhere around $500-550 for a prototype batch (maybe 6 boards? i forget the quantity)
<cr1901_modern>
controlled impedance?
<azonenberg_work>
awygle: they seem like a good compromise in terms of really nice results without the 4pcb price
<azonenberg_work>
cr1901_modern: yes
<azonenberg_work>
i think +/- 10%?
<cr1901_modern>
what's that mean in the context of a board house?
<azonenberg_work>
You tell them the impedance you want a given trace to be
<cr1901_modern>
some board houses won't even try to get the correct impedance calculated by, say, kicad
<azonenberg_work>
They do TDR testiing at the fab and tweak the etch to keep it within tolerance
<cr1901_modern>
ahhh
* cr1901_modern
has seen ppl do RF boards using oshpark. Prototypes of course
<azonenberg_work>
and if you dont ask no board house will try
<azonenberg_work>
(those were circa 2014-2015 prices btw)
<awygle>
how did I convince myself this LNB board was hand solderable
<awygle>
It has 1mm square dfn-6 parts
<azonenberg_work>
awygle: hand reflowable
<azonenberg_work>
:p
<azonenberg_work>
awygle: also see PM
<awygle>
And I didn't even use big resistors! I thought I used 0603 or 0805 on this one
<awygle>
Dammit past me
* azonenberg_work
uses 0402 by default unless i have an engineering reason to go bigger (value not available in that package, power dissipation, etc)
<azonenberg_work>
but i target stainless steel stencils + oven reflow for all of my designs
<azonenberg_work>
i only hand solder PTH connectors now
<azonenberg_work>
the only other thing i use my iron for is rework
<cr1901_modern>
azonenberg_work: well I assume controlled impedance is great, but not necessarily required to get started w/ RF?
<awygle>
being iron solderable was an explicit goal for this project
<azonenberg_work>
awygle: ... oh
<awygle>
I don't even have a stencil lol
<awygle>
Ohhh well
<awygle>
cr1901_modern: you can do impedance calculations based on the nominal stack up without paying for control. that's often good enough if you're not at the edge of your performance envelope.
<awygle>
You definitely need to at least try though. Running RF traces without thinking will end badly.
<azonenberg_work>
yeah you need to plan
<awygle>
Osh park is a good place for prototypes because they use an RF laminate for their 4 layer service
<azonenberg_work>
yeah fr408 is nice
<awygle>
This mixer is an osh park 4 layer
<azonenberg_work>
I intend to use them for my ethernet switch backplane
<azonenberg_work>
and probably the line cards too
<awygle>
At 3ghz
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<cr1901_modern>
Running RF traces without thinking will end badly. <-- isn't that what the calculator is for?
<cr1901_modern>
trace impedance calculator*
<cr1901_modern>
keep them the same length, close together espec if they're differential pairs, and make sure impedance matches
<awygle>
yes
<awygle>
just saying you have to do that stuff lol
<cr1901_modern>
fair enough
<awygle>
Arright this game is not worth the candle.
* awygle
orders a stencil
<azonenberg_work>
cr1901_modern: also "close together" is fun for diffpairs
<azonenberg_work>
since spacing chanegs impedance
<azonenberg_work>
and when you have things like connectors, or vias
<azonenberg_work>
the spacing will change...
<awygle>
eh just keep it short
<awygle>
nbd for <5GHz or so
<awygle>
azonenberg_work: SAC flows weird :-P
<azonenberg_work>
awygle: i ilke it
<azonenberg_work>
the increased surface tension holds parts better for 2-sided reflow
<awygle>
i'm sure. i'm just used to 63/37 so it's weird
<azonenberg_work>
meanwhile work uses 63/37 for some annoying reason
<azonenberg_work>
and i'm used to SAC
<azonenberg_work>
so i think IT is weird melting at such a low temp etc
<azonenberg_work>
:p
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<kc8apf>
I think pof2jed is just repackaging it as an SVF or similar
<kc8apf>
the actual bitstream contents don't need to be understood for that
<rqou>
no, it explicitly mentions migrating from a "competitor" cpld to an atmel cpld
<kc8apf>
huh, yeah
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<kc8apf>
they have a table mapping Altera MAX part numbers to Atmel part nos
<kc8apf>
and pof2jed would definitely preserve the configuration data format
<awygle>
Woah
<awygle>
That's pretty wild
<kc8apf>
fwiw, POF looks pretty simply to parse. If anyone wants to poke at MAX parts, I can whip up something to unpack the config data
<rqou>
need to finish project14 first
<whitequark>
awygle: hi
<awygle>
whitequark: hello
<whitequark>
so
<whitequark>
let's chat about the board?
<rqou>
EFnet unlinked eris :(
<rqou>
it's april 2nd
<awygle>
whitequark: yes let's. so the main thing missing is the lattice ultraplus footprint?
<whitequark>
yup
<whitequark>
I think it makes sense to use ultraplus because of the 1M SRAM inside...
<whitequark>
not that I actually have any direct plans for the SRAM
<whitequark>
using HX would mean having more pins, but do we really need more pins?
<awygle>
sec
<awygle>
so the ultraplus has 39 user i/o
<awygle>
and the 2232H has 32
<awygle>
(not counting special purpose stuff like eeprom and usb)
<whitequark>
yep
<whitequark>
but
<whitequark>
some of those I/O will go to 68013A
<awygle>
right, that was my next question
<whitequark>
let me say how many exacctly
<awygle>
meanwhile any HX has tons of I/O but if we need an 8K it'd be a BGA not a QFN/QFP
<whitequark>
8 or 16 data bus lines (probably 8, I think the advantage of 16 lines is miniscule in our case), RD/WR/OE, ADR0/ADR1, FLAGA
<whitequark>
these are a minimum
<awygle>
at 0.5mm which is fairly tight
<rqou>
er, no?
<whitequark>
so, at least 14 IO go to 68013A
<rqou>
there's one huge QFP package
<awygle>
ah i guess the 8K is the 4K
<awygle>
but lattice doesn't offer the 8K in the huge QFP, only the 4K
<rqou>
oh right, it's marketed as 4k
<whitequark>
oh, also CLKOUT, so 15
<whitequark>
now regarding bitstream loading, you need more pins...
<whitequark>
but some of those can be multiplexed with the FIFO interface
<awygle>
so if we want the full 32-bit interface of an FT2232H we need to use an HX (or an LP but the package situation is even worse there unless we can fit in 1K)
<whitequark>
so, we need SCK, SPI, SO, SS, CDONE and CRESET
<whitequark>
on UP, all except CRESET can be configured as user I/O, so they can be connected to the low bits of the B port (I think, let me check something)
<whitequark>
yes, ports A, B and D are bit-addressable
<whitequark>
on HX and LP the configuration pins are dedicated
<whitequark>
so these will go to the D port, and we can't use the 16-bit interface of CY7C68013A even if we wanted
<whitequark>
(bumping to the next largest package is seriously increasing cost)
<whitequark>
(and decreasing availablility)
<awygle>
which package are you looking at?
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<whitequark>
56-pin ones
<whitequark>
I was thinking about using the QFN 68013A and QFN UP5
<rqou>
oh btw (offtopic): i had a chat with my father and he told me that he did gigE on a spartan3 back in the day (approximately comparable in performance to the ice40), so rgmii on an ice40 should actually be possible if you can actually get the signals through the IOs and into the fabric
<rqou>
but back in those days they were using gmii
<rqou>
and yes, timing closure sucked :P
<awygle>
ah ok. i think i need a better idea of the block diagram (not very familiar with the cypress chip)
<awygle>
for the 32 user i/o of the 2232h, do any of those come from the 68013A directly?
<whitequark>
no
<whitequark>
the 68013A is purely an USB engine, and it also does configuration
<whitequark>
the idea is that it should be completely transparent
<awygle>
okay. so if we want to support all 32, we need to use an HX, because we need 14 pins between the 68013a and the UP5
<awygle>
leaving 25
<whitequark>
15, leaving 24
<awygle>
right, clkout
<whitequark>
but preferably also PKTEND, FLAGB, FLAGC, and at least one of INT0/1 pins
<awygle>
so we either drop to 16 user i/o or use the HX
<awygle>
basically
<whitequark>
yes
<rqou>
hmm, whitequark i'm wondering why you don't just feed usb into an fpga via a ulpi phy? too much work?
<awygle>
which means, for availability and hobbyist-assemble-ability, probably the 20mm QFP
<whitequark>
rqou: I'm not familiar with uh, any part of that stack
<whitequark>
and implementing USB in hardware from scratch would suck big time
<rqou>
i thought daisho already did it?
<whitequark>
on ice40?
<rqou>
not on ice40
<rqou>
on some altera part
<awygle>
cyclone iv
<rqou>
(i know nothing about the altera product lineup)
<whitequark>
well, I don't want to touch usb phys with a ten foot pole
<rqou>
any particular reason? IP concerns?
<whitequark>
dealing with the transport layer is already enough of a pain
<whitequark>
if I drop even further down it'll mean way too much debugging headache
<whitequark>
I *want* the FIFO that 68013A provides me
<whitequark>
awygle: oh I think it's not even much choice actually
<whitequark>
the pin count that is
<whitequark>
68013A effectively only has four USB endpoints available for the FPGA
<rqou>
ah ok, quite a reasonable decision
<whitequark>
oh, 2232H has *two* MPSSEs, not four
<sorear>
Also tinyfpga
<whitequark>
so in theory
<awygle>
correct
<whitequark>
we could support both MPSSEs
<whitequark>
but with reduced pin count
<whitequark>
unfortunately we can't stuff four JTAGs into it
<whitequark>
well
<whitequark>
not while keeping USB-side compatibility with 2232H
<whitequark>
I do want to be able to stuff four JTAGs or two JTAGs and two UARTs
<whitequark>
but that will require multiplexing in software
<whitequark>
which is fine
<awygle>
sounds like we're converging on "QFN UP5, two MPSSEs, 8 pins each"?
<whitequark>
I think so
<whitequark>
we have three more free pins on the FPGA then
<awygle>
EEPROM?
<whitequark>
since "three free pins" is with the INT0/1 pins included, that can be handled via 68013A
<whitequark>
the idea is that asserting INT0 is an "escape hatch"
<whitequark>
for example we can use that to get two more USB endpoints (EP1IN/EP1OUT) with some work from 68013A core
<whitequark>
it'll be slower but it'll work just fine for UART
<whitequark>
8051 at 48 MHz can copy bytes around well enough
<whitequark>
I guess those can be hooked up to LEDs
<whitequark>
or just broken out
<whitequark>
or, we could skip INT1 and have 10 pins assigned to every MPSSE
<awygle>
probably best to wait and budget them after routing
<awygle>
or at least after schematic
<awygle>
in case something comes up
<whitequark>
yup makes sense
<whitequark>
okay now the hard part.
<whitequark>
how do we interface MPSSE pins out from the board?
<whitequark>
specifically: level shifting and connectors
<whitequark>
I definitely want to be able to have an ability to easily connect two JTAGs and four UARTs to this board (this won't be FTDI-transparent mode on USB, of course)
<awygle>
again not being familiar with the cypress part, can we do an adjustable regulator on VIO with the set point DAC on the cypress part to avoid level shifting?
* whitequark
snorts
<whitequark>
DAC?
<whitequark>
it ain't got no analog peripherals on it
<awygle>
well, or a full PMIC i guess
<awygle>
i meant like, an I2C DAC
<whitequark>
ah
<whitequark>
yes, an I2C DAC would fit very well, it can be attached to the EEPROM bus at zero additional pin cost
<whitequark>
regarding VIO... let me check
<awygle>
i can feel myself trying to overdesign... we could add a Vsense pin to our outgoing connector and an I2C ADC to adjust voltage to that level...
<whitequark>
what *is* going to be our outgoing connector though?