<pie_> idk
<pie_> seems like the answer has some nice commented code
<pie_> didnt read
digshadow has quit [Ping timeout: 245 seconds]
digshadow has joined ##openfpga
digshadow has quit [Ping timeout: 256 seconds]
<kc8apf> It works if you capture the continuation as part of the last element of a line and remove it later. BLIF doesn't say where continuations are allowed other than at end of line.
<kc8apf> It could be handled by using a macro to wrap other combinators. That way continuations would be caught between any two tokens. Nom does that with ws! but it's ugly.
<whitequark> I stand by my claim that lexing and parsing being distinct is generally a good idea
<cr1901_modern> >BLIF doesn't say where continuations are allowed other than at end of line.
<cr1901_modern> Sounds like this could be represented as a "newline_or_continuation_then_newline" rule?
<cr1901_modern> kc8apf: I don't see it either, why are parser combinators bad for this? continuation token is only legal in one place, so if you see it in any other context, you "reject the input sentence"
<kc8apf> Because that one place is between every two tokens.
<kc8apf> I'd love to see it be done with parser combinators. I spent two days trying to figure out how to do it with nom. I've got a working version with pest in 4h.
Guest1936 has quit [Quit: Client quit]
cyrozap has joined ##openfpga
<pie_> will anyone ask @nanographs if there are scans of his super awesome electron microscope manuals
<pie_> or if he will make scans
* pie_ doesnt twitter, the one thing thats social and might not be total crap
<pie_> i mean id send him an email but didnt see anything anywhere
<pie_> UGH.
* pie_ tears himself off that twitter again
<pie_> what is with this guy and toys
<rqou> pie_: adam -AT- mccombs.us
<pie_> oh cool thanks
<whitequark> pie_: twitter is total crap.
<pie_> whitequark, i meant the people on it
<whitequark> well
* pie_ points at $COOL_PEOPLE :P
<pie_> rqou, howd you find that
<qu1j0t3> /b 11
<qu1j0t3> pie_: "Private correspondence, May, 2018."
<qu1j0t3> pie_: the R in rqou stands for Resourceful
<pie_> ;)
<rqou> whitequark: do you like any social media?
<pie_> whats there to like? :p
<qu1j0t3> <_<
<qu1j0t3> >_>
<pie_> email sent \o/
<whitequark> rqou: email?
<rqou> lol
<rqou> that's not really social media is it
<pie_> also, rqou goes and exposes super sekrit email in public channel :P
<whitequark> idk mastodon is generally less of a trash heap than twitter
<whitequark> irc can be okay but rarely
<rqou> somehow i never have any real problems with Twitter
<rqou> must not be popular enough
<whitequark> i do not enjoy having a stream of depressing news blasted in my face 24/7
<whitequark> especially given that almost all of those news happen in a place i'm not within 20 thousand km of
<whitequark> if i unfollowed everyone who complains about trump i'd have to just unfollow everyone
steakpizza has joined ##openfpga
<whitequark> exaggerating but only slightly
<rqou> i mean, I'm kinda in the middle of the shitshow :P
<pie_> write a greasemonkey script that hides posts containing trump
<rqou> being in the bay area and all that
<qu1j0t3> twtir full of libruls
rohitksingh_work has joined ##openfpga
steakpizza has quit [Remote host closed the connection]
steakpizza has joined ##openfpga
steakpizza has quit [Remote host closed the connection]
<pie_> ok so apparently overleaf can ue asymptote, which is cool, but im getting latex compile errors :(
<pie_> ugh caused by my language packages
<pie_> aaand wrong chan
steakpizza has joined ##openfpga
Bike has quit [Quit: Lost terminal]
steakpizza has quit [Remote host closed the connection]
steakpizza has joined ##openfpga
steakpizza has quit [Remote host closed the connection]
<openfpga-github> [Glasgow] whitequark commented on issue #33: I'm dumb and this is not necessary. The Yageo part numbers have the resistor value in the part number, e.g. `10K` in `RC0603FR-1310KL` or `604R` in `RC0603FR-07604RL`. Same for package. A cursory visual check is well enough. https://github.com/whitequark/Glasgow/issues/33#issuecomment-391933399
<openfpga-github> [Glasgow] whitequark closed issue #50: Figure out exactly what happens during Vio short-circuit to GND https://github.com/whitequark/Glasgow/issues/50
<openfpga-github> [Glasgow] whitequark opened issue #60: TI TPD3S0x4 https://github.com/whitequark/Glasgow/issues/60
steakpizza has joined ##openfpga
genii has quit [Remote host closed the connection]
steakpizza has quit [Remote host closed the connection]
<rqou> daveshah: "Updating the contents [of debian packages] probably will not be too difficult."
<rqou> lol that guy must be dreaming
<rqou> whitequark: are turbopump controllers really "just" brushless motor controllers?
<whitequark> yes
<whitequark> well, if you don't have fancy maglev bearings
<rqou> no fancy feedback systems or anything?
<whitequark> it has a thermistor.
<rqou> ah
<whitequark> does that count as fancy feedback?
<rqou> i was expecting some fancy proprietary feedback loop to ensure that the motor runs optimally
<pie_> any feedbaccis fancy feedbacc :pp
<whitequark> lol nope it just spins it up until it doesn't spin up anymore
<rqou> and if something goes wrong?
<rqou> your pump explodes? :P
<whitequark> the rotor absolutely does have the resonance mode that destroyed the iranian ultracentrifuges, so how does it avoid those? by spinning up and hoping it doesn't stay in those for too long
<rqou> that's a surprising amount of hoping :P :P
<rqou> so what about those fancy maglev bearings?
<whitequark> there are fancier controllers that can do things like "if the pump spins at 70% for more than five minutes turn it off and shut down the system"
<whitequark> but that's all on top of a good old BLDC driver
<whitequark> and the cost *really* does not justify those
<whitequark> they're like $1200+ vs $120+ for EXDC
<pie_> why is wrapping around a figure in latex so hard?
<whitequark> and all functions can be implemented in one evening on an atmega
<whitequark> pie_: oh i see youre entering the fetish scene
<pie_> ohhhh haha phrasing :D
<rqou> why is everything vaguely in the "scientific instrumentation" universe overpriced AF?
<whitequark> rqou: no idea, i don't touch pumps with maglev bearings
<whitequark> too complex
<whitequark> for no real good benefit
<whitequark> if my pump blows i can always just take another one from the shelf
<whitequark> :P
<whitequark> rqou: because the set of people who make purchasing decisions and the set of people who pay are disjoint
<pie_> do maglev pumps even spin down in vacuum :p
<rqou> lol
<whitequark> pie_: yes
<whitequark> eddy currents
<pie_> yeah i was about to ask
<whitequark> however, given that my pump that has an oil bearing spins down in vacuum for like over ten minutes
<pie_> what if electromagnets
<whitequark> *well* over ten minutes to full stop
<whitequark> a maglev one probably can spin down for hours
<pie_> though electromagnets sound like they would only cause problems
<whitequark> well yes the maglev bearing is active
<pie_> oh
<pie_> i meant the inner bearing
<whitequark> inner?
<pie_> idk the terminology
<pie_> i figured theres permanent magnets on the rotor or whatsit
<whitequark> it's an induction motor afaik
<whitequark> but i am not completely sure
<pie_> actually im retarded
<pie_> if you used electromagnets on the rotor, and turned them off so there wouldnt be eddy currents...
<pie_> there would be nothing holding up the rotor :P
<whitequark> the maglev bearing uses permanent magnets though
<whitequark> regardless of what the motor uses
<pie_> yeah sure i was just musing
<whitequark> there's also a safety bearing
<whitequark> so it doesnt just crash into a wall
<pie_> yeah i meant i figured the bearing was a motor or something
<pie_> i guess
* pie_ shows his vast knowledge
<whitequark> i dont actually know how the bearing works
<pie_> anyway, back to fighting with latex
<pie_> putting the content in is great, its always the formatting i cant do
<rqou> whitequark: don't have enough money to buy and rebuild a pump with maglev bearings?
<whitequark> rqou: i dont rebuild pumps
<whitequark> well
<whitequark> not like deeply
<whitequark> i can polish a flange or w/e
<rqou> does cleaning out rotary pump oil not count? :P
<whitequark> i dont have enough time or motivation to rebuild a totaled pump cuz perfectly good ones are available for cheap
<whitequark> not really
<whitequark> that was easy
<whitequark> just use some r131b
<whitequark> *141b
<rqou> "just"
<whitequark> what
<whitequark> i literally poured it in and shaked it
<whitequark> like a goddamn blade cocktail
<rqou> I'll just go grab the r141b that i totally have sitting on a shelf :P
<whitequark> well yeah that's becuause you live in State Suckistan
<whitequark> clearly you need to move to a country with *good* environmental protection regulations like russia or china
<whitequark> i walked to an ac shop and asked for "something to clean a pump real good"
<whitequark> they didnt disappoint
<rqou> "an ac shop" <-- this exists?
<rqou> i guess I'm not good at "the IRL interactions"
<whitequark> yes, of course? a few weeks before that i walked into it and went out with a complete set of parts required to make a refrigerator, and made a refrigerator
<whitequark> all because i got up one day and became manic and decided to make a refrigerator
<rqou> how do you go about finding these IRL businesses?
<whitequark> google?
<whitequark> there's a ton of shops of all kinds across industrial areas in moscow
<whitequark> like i can just google and then call and then have someone cnc me a part in a few days
<whitequark> one time though i had to go to a factory in the middle of fucking nowhere to actually retrieve the part
<whitequark> it wasn't even on a map
<pie_> > being in mosco
<pie_> w
<whitequark> they had to tell me the route from the bus stop by phone
<whitequark> turn by turn
<rqou> lol
<whitequark> theres also a real huge amount of people moonlighting on their factories cuz they arent paid shit
<rqou> wait, you actually do this weird "calling" thing? not a real millennial :P :P
<whitequark> so you can find really competent machinists working for extremely good prices
<whitequark> sometimes they're drunk though so the parts aren't that good
<whitequark> it's a hit or miss
<whitequark> i also did some late night stays in machine shops working with people who had a burning desire to inform me of their very "working class" politics
<whitequark> and during that, once we mistyped a number into a sheet metal bender and a piece of thing we were trying to bend snapped with a loud bang and damn near eviscerated one of us
<sorear> I have absolutely no idea what that entails in Moscow
<whitequark> but instead made a hole in the wall like 3m across from the machine
<whitequark> sorear: are you familiar with the concept of "white trash" in the US
<sorear> Yes
<whitequark> well newsflash white trash looks the same anywhere
<whitequark> i think i can summarize it in one sentence
<whitequark> it was around the time ru invaded ua
<whitequark> so he said, quote, "well i think it's better for russia to be an empire right now"
<whitequark> i think if someone made "make russia great again" into a snappy slogan it would have -so- taken off
<whitequark> i retaliated by never bringing any business to him again.
<whitequark> rqou: yeah if you want to do any actual business with any real machine shops you gotta call
<whitequark> and then you gotta drag your sorry ass to the place and argue with them and such
<whitequark> well, depends on the place, sometimes email is okay for sending drawings
<whitequark> rqou: that said i never got anything done in hk
<rqou> don't speak Cantonese? :P
<whitequark> yes
* whitequark pokes awygle
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 248 seconds]
digshadow has joined ##openfpga
esden has joined ##openfpga
<azonenberg> rqou: any ideas on an ETA? I'll be at work most of the day
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 264 seconds]
soylentyellow has quit [Ping timeout: 260 seconds]
soylentyellow has joined ##openfpga
steakpizza has joined ##openfpga
Sinclair2 has joined ##openfpga
steakpizza has quit [Ping timeout: 260 seconds]
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 252 seconds]
Sinclair2 has quit [Quit: Bye Bye]
Miyu has joined ##openfpga
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 240 seconds]
<openfpga-github> [libfx2] whitequark pushed 2 new commits to master: https://github.com/whitequark/libfx2/compare/2574bfd8c9ce...4b6f1f59b467
<openfpga-github> libfx2/master 4b6f1f5 whitequark: Fix dptr corruption in SUDAV interrupt handlers.
<openfpga-github> libfx2/master 1534f4c whitequark: Fix macro hygiene in SETUP_EP0_IN_DATA.
<openfpga-github> [Glasgow] whitequark closed issue #43: Cache bitstreams https://github.com/whitequark/Glasgow/issues/43
<openfpga-github> [libfx2] whitequark force-pushed master from 4b6f1f5 to 579d5e5: https://github.com/whitequark/libfx2/commits/master
<openfpga-github> libfx2/master 579d5e5 whitequark: Fix dptr corruption in SUDAV interrupt handlers.
<openfpga-github> [Glasgow] whitequark force-pushed master from 6bbd801 to 0057ee1: https://github.com/whitequark/Glasgow/commits/master
<openfpga-github> Glasgow/master 0057ee1 whitequark: Fix dptr corruption in EPn interrupt handlers.
rohitksingh_work has quit [Ping timeout: 248 seconds]
rohitksingh_work has joined ##openfpga
tnt_ is now known as tnt
eduardo__ has joined ##openfpga
rohitksingh_work has quit [Ping timeout: 240 seconds]
eduardo_ has quit [Ping timeout: 240 seconds]
Maya-sama has joined ##openfpga
Miyu has quit [Ping timeout: 260 seconds]
genii has joined ##openfpga
Maya-sama is now known as Miyu
Mathias__ has quit [Quit: Leaving]
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 268 seconds]
rohitksingh has joined ##openfpga
Maya-sama has joined ##openfpga
Miyu has quit [Ping timeout: 248 seconds]
X-Scale has quit [Ping timeout: 260 seconds]
Maya-sama is now known as Miyu
X-Scale has joined ##openfpga
ondrej2 has quit [Quit: Leaving]
rohitksingh has quit [Quit: Leaving.]
rohitksingh has joined ##openfpga
azonenberg_work has quit [Ping timeout: 260 seconds]
Maya-sama has joined ##openfpga
Miyu has quit [Ping timeout: 260 seconds]
rohitksingh has quit [Quit: Leaving.]
Miyu has joined ##openfpga
Maya-sama has quit [Ping timeout: 245 seconds]
Bike has joined ##openfpga
<rqou> azonenberg: departing now, see you in 14+ hours
azonenberg_work has joined ##openfpga
azonenberg_work has quit [Ping timeout: 268 seconds]
<awygle> daveshah: ping?
<daveshah> awygle: ping
<awygle> daveshah: should I be directing people like https://twitter.com/micko_mame/status/1000046025988558848?s=09 to prjtrellis?
<daveshah> awygle: yeah, the bitstream format for the MachXO2 is similar
<daveshah> I don't think the bits inside the tiles are the same though
<awygle> cool :) it seems this person is aware anyway. i was more concerned about whether this is a thing we're advertising
<daveshah> awygle: Yeah, definitely advertise it wherever
<awygle> cool cool cool
<daveshah> How goes the LM board by the way?
<awygle> i fixed the short!
<daveshah> Awesome
<awygle> so in theory it should be programmable
<awygle> i've been swamped and dedicating what free time i have to Glasgow stuff so as not to hold up whitequark
<daveshah> Yeah, no worries
<awygle> but this long weekend should let me finish that off, do a bunch of glasgow C work, and (stretch goal) get started on a trellis I/O fuzzer
<awygle> azonenberg 's exploitation of free labor notwithstanding :p
<daveshah> That would be awesome
<awygle> actually i think i'll try and test the LM board tonight so that if it doesn't work i can bring it to azonenberg's and get him to work some rework magic for me
<daveshah> Sounds sensible
<awygle> copy branch. how are things going generally?
<daveshah> Good
<daveshah> Routing fuzzer to determine connectivity is working for PIO tiles, but config bits need doing and will be the main work for PIO
<daveshah> I won't have any time this weekend to work on it, so it would be great if you could look at that
<daveshah> The main thing is to work out which bits are set for different io types and directions
<awygle> that sounds doable
<daveshah> But I think the config bit fuzzer might need reworking for that. For IO fuzzing it is better to use Verilog and LPF input rather than NCL
Maya-sama has joined ##openfpga
<awygle> why is that do you think?
<awygle> is this an untyped string definition of the modes i see?
<daveshah> The IO settings in the NCL files are a bit of a mess and very low level
<daveshah> We'd first have to work out which IO types correspond to which ncl settings manually
<awygle> yeah i see
<daveshah> If you want, EBR or DSP config bits wouldn't need that and might be an easier first target
<daveshah> And need doing too, particularly ebr
<awygle> well i know verilog better than ncl anyway :p so i'll mod the config fuzzer to accept verilog
<awygle> that seems globally useful anyway
<daveshah> diamond.sh already takes either a Verilog or NCL file
<daveshah> If given a Verilog file it'll also look for an lpf file with the same name in the same folder
<daveshah> Basically, you need to modify the fuzzing framework to take a Verilog and LPF file and template them as an option instead of ncl
<daveshah> It shouldn't be a particularly big job
Miyu has quit [Ping timeout: 245 seconds]
<awygle> mhm
<daveshah> Have a look at how the current logic tile config fuzzers work, basically we want the same for all the different IO types
<awygle> hm, sort of tempted to do the lazy approach of templating the verilog and then generating an ncl so i can use all these other functions that take one. probably not the best way to do that though.
<daveshah> It's probably easier to modify the functions to take Verilog
<daveshah> Nothing is ncl specific in those functions
steakpizza has joined ##openfpga
<awygle> yeah it looks pretty easy. and better to do it right, especially this early
<daveshah> The main problem is not Verilog or NCL, that makes negligble difference. The only significant change will be the need to template two files - Verilog and lpf - rather than one
<daveshah> Unless diamond does allow everything to be specified by Verilog attributes
<awygle> you can LOC something
<awygle> i'm not sure about, like, I/O standards
azonenberg_work has joined ##openfpga
lain has quit [Ping timeout: 252 seconds]
steakpizza has quit [Ping timeout: 260 seconds]
<awygle> hm, there's at least some stuff. like slew rate and termination.
<awygle> you can find a list of supported attributes in the Constraints Reference Guide>HDL Attributes of the Diamond help
user10032 has joined ##openfpga
<daveshah> awygle: Yep, looks like everything can be done through verilog attributes
<daveshah> That's actually quite a nice guide
<awygle> yup
<daveshah> Looks like for things like drive strength it varies a bit by io voltage
<daveshah> For those we should call the setting values in the enum things like "2mA_1.2V" and try all possibilities
digshadow has quit [Quit: Leaving.]
digshadow has joined ##openfpga
steakpizza has joined ##openfpga
Maya-sama has quit [Ping timeout: 260 seconds]
steakpizza has quit [Remote host closed the connection]
steakpizza has joined ##openfpga
bitd has joined ##openfpga
Xark has quit [Ping timeout: 256 seconds]
Xark has joined ##openfpga
digshadow has quit [Ping timeout: 256 seconds]
digshadow has joined ##openfpga
steakpizza has quit [Remote host closed the connection]
steakpizza has joined ##openfpga
steakpizza has quit [Remote host closed the connection]
steakpizza has joined ##openfpga
<rqou> fyi azonenberg: reached Redding, still got quite a ways to go
steakpizza has quit [Remote host closed the connection]
steakpizza has joined ##openfpga
lain has joined ##openfpga
<awygle> ah yes redding, the last in N out in California
<mithro> daveshah: morning!
<daveshah> mithro: evening!
<mithro> daveshah: How goes things?
<daveshah> mithro: I did take a look at your VPR and symbiflow branches, and got them running
<daveshah> But I'm afraid I have limited time this weekend to look at stuff in detail
<mithro> daveshah: Okay cool
<daveshah> It looks like the naming in the HLC is a bit off from icebox naming?
<daveshah> of the nets
<mithro> daveshah: HLC uses quite a different naming scheme it seems
<daveshah> mithro: OK, that's a bit crap
<daveshah> That explains why you wanted icebox_unexplain
<daveshah> :P
<mithro> daveshah: I actually think the HLC names kind of make more sense -- they are globally unique rather than being tile specific
<daveshah> mithro: sounds a bit like what I'm dealing with the ecp5 actually (the dump of a design from Diamond uses global names)
<daveshah> But I have to make the reverse transform to get a generic bit database for a tile type
<mithro> daveshah: Yeah
<mithro> daveshah: When are you going to start putting the ECP5 stuff into the arch-defs?
<daveshah> mithro: not sure, have other priorities on that at the moment
Bike has quit [Ping timeout: 260 seconds]
steakpizza has quit [Ping timeout: 264 seconds]
<azonenberg_work> rqou: yay
<azonenberg_work> awygle: also woo v0.3 crosstalk characterization boards shipped
<awygle> woo shipping
<azonenberg_work> i've been busy but started re-routing the line card last night
<azonenberg_work> with the fixed pinout
<azonenberg_work> Side note, thinking about the much longer term
<azonenberg_work> plus a kintex and a QSFP+
<azonenberg_work> DC to 1 GHz AWG anyone?
<azonenberg_work> By "arbitrary waveform" I mean both repetitive waveforms in RAM and "raw I/Q or scalar waveform over TCP at ludicrous speed"
<azonenberg_work> For 12 Gsps 1 GHz bandwidth, $135 is impressively cheap
<daveshah> Shame there isn't an equivalent adc with the same pricing :P
<azonenberg_work> This guy is cloise (7.6 bit 5 Gsps for $311)
<azonenberg_work> i was considering interleaving two to get 10 Gsps and making a DSO front end with it
<azonenberg_work> But of course, yet another project i lack time and budget for...
<daveshah> Not as bad as I thought actually
<daveshah> I feel unlike most electronics these things are actually getting cheaper
<awygle> ain't nobody got budget fo dat
digshadow has quit [Ping timeout: 240 seconds]
Bike has joined ##openfpga
digshadow has joined ##openfpga
user10032 has quit [Quit: Leaving]
bitd has quit [Quit: Leaving]
<pie_> lmao
<pie_> <The_Cat> what do you get when you cross a mosquito with a mountain climber?
<pie_> <The_Cat> nothing, you can't cross a vector with a scalar
* qu1j0t3 groans
<awygle> shaaaaaame
<qu1j0t3> b&
<azonenberg_work> pie_: there was a political party at my school
<azonenberg_work> known as the Vector Party
<azonenberg_work> that ran for student government one year
pie_ has quit [Remote host closed the connection]
<azonenberg_work> Context... the Grand Marshal (highest elected student gov official) wears a top hat as a symbol of the office
<azonenberg_work> So an opposing campaign started putting up posters saying "When a Vector wears a little hat, its magnitude is only one"
pie_ has joined ##openfpga
<azonenberg_work> (15:42:38) azonenberg_work: pie_: there was a political party at my school
<azonenberg_work> (15:42:50) azonenberg_work: that ran for student government one year
<azonenberg_work> (15:42:45) azonenberg_work: known as the Vector Party
<pie_> what the fuck my x11 just died for no reason
<azonenberg_work> (15:43:14) azonenberg_work: Context... the Grand Marshal (highest elected student gov official) wears a top hat as a symbol of the office
<azonenberg_work> (15:43:32) azonenberg_work: So an opposing campaign started putting up posters saying "When a Vector wears a little hat, its magnitude is only one"
<pie_> oh my god
<pie_> xD
<pie_> so how likely is it that someone pwned mymachine
<pie_> x11 pls
<pie_> azonenberg_work, very witty :D
<rqou> azonenberg: status: Medford
* pie_ tries to recover his workflow again :(
<awygle> woo you made it through the pass
<awygle> enjoy grants' pass, it is lovely
<azonenberg_work> pie_: so ~6 hours to go?
* awygle wants to go on a road trip
<awygle> more like 7 or 8
<rqou> it's raining and completely fogged up today
<awygle> oh that's a bummer
<rqou> like 10 ft visibility at the worst moments
<rqou> didn't get to see the sundial bridge either
<sorear> Huh, there are a lot of Medfords
<rqou> but yeah, out of the People's Republic of California :P
<awygle> my advice, abandon your plan, hang a left at 42, and spend a nice relaxing weekend on the Oregon coast :p
<digshadow> rqou: playing with cr2
<digshadow> if I try to put more than 32 inputs on a FB, it sort of falls part
<digshadow> apart
<digshadow> my understand is that I should be able to put 40 FB external inputs + 16 feedback from the FF's and/or I/O
<digshadow> let me generate with 33
<rqou> oh right
<rqou> the fitter might have an option to stop at 32
<digshadow> added comment
<digshadow> okay let me look at that
<digshadow> why would it do that?
<rqou> because using up all the inputs can make it impossible to fit a revised design into the same pinout
<rqou> also, it should be 40 total inputs, from anywhere
<rqou> there's no shortcut paths from the local FFs
<sorear> What’s cr2?
<digshadow> sorear: cool runner 2, ie xc2c64 type parts
<digshadow> rqou: got it, thats weird though
<digshadow> although admittedly if I bought a car and later found a switch to add 100 HP, I'd be rather excited when I found it
<rqou> old-school designers often cared about retrofitting extra functionality
<digshadow> -inputs 32 -pterms 28
<digshadow> probably related to that
<digshadow> hmm so this is interest
<digshadow> tool default is 36, but ISE project set it to 32
<rqou> azonenberg_work: sorry, no otr right now
GenTooMan has joined ##openfpga
Guest98794 is now known as CoffeeFlux
CoffeeFlux is now known as Moogy
Moogy is now known as CoffeeFlux
<digshadow> rqou: yep that did it
<digshadow> FB2 16/16* 40/40* 16/56 16/16* 0/1 0/1 0/1 0/1
<digshadow> rqou: also btw you were mentioning you had difficulty filling up the FB I think
<rqou> well, on the 32a you literally can't fill all inputs
<rqou> oh wait you can
<rqou> nvm
<digshadow> do I need to be aware of 32a vs 32 differences?
<rqou> no
<azonenberg_work> digshadow: tl;dr the 32A just adds i/o banking
<azonenberg_work> the 32 is one bank
<azonenberg_work> the only diff is the last 4 bits in the bitstream
<rqou> there's two extra bits to control io bank voltages
<rqou> oh, 4
<azonenberg_work> yeah 2 in and 2 out
<azonenberg_work> why they have separate in and out idk
<whitequark> 2 in and 2 out?
<whitequark> like input and output voltages?
<azonenberg_work> yes
<azonenberg_work> one per bank
<azonenberg_work> of each
<whitequark> yeah that makes a lot of sense
<azonenberg_work> but the ibuf and obuf are the same vccio
<whitequark> you can then make a level shifter using just one bank
<azonenberg_work> every iostandard i tried set both bits to the same voltage
<azonenberg_work> hmmmm i dont know if thats legal
<whitequark> arrested by voltage cops
<whitequark> (so that is what "surge arrestor" means)
<azonenberg_work> So first of 1.5/1.8 are the same bit just diff timing
<azonenberg_work> as are 2.5/3.3
<awygle> can't believe you haven't tried hacking them to different bits
<azonenberg_work> no i meant, i havent found any software config that makes them diff
<whitequark> maybe no one actually asked
<whitequark> could be one of those features that dont get implemented fully until a customer wants it
<whitequark> or the other way around, someone asked for it but it's too obscure to document
<awygle> or an engineer designed it but it doesn't work lol
<azonenberg_work> lol also possible
<azonenberg_work> ERROR:Cpld:871 - The input 'din' specified with I/O standard 'LVCMOS18' cannot
<azonenberg_work> the selected implementation options.
<azonenberg_work> ERROR:Cpld:868 - Cannot fit the design into any of the specified devices with
<azonenberg_work> standard.
<azonenberg_work> be assigned to FB1. Other I/Os in this function block use a different I/O
<azonenberg_work> So, ISE doesnt let you mix LVCMOS18 input and LVCMOS33 output in a bank
<azonenberg_work> Which is what i remembered
<azonenberg_work> My guess is that the input buffers will fry if you have a VCCO above the safe range
<awygle> sed -e
<azonenberg_work> As a general rule I've avoided playing with bitstream configs that seemed sketchy unless i had re'd the silicon and knew exactly what they'd do
<azonenberg_work> Or i was actively trying to kill the chip :p
<azonenberg_work> (but in that case i normally picked a bitstream config that i *knew* would kill it)
<awygle> your general rule is no fun
<azonenberg_work> lol
<azonenberg_work> well if you want to join our hackathon tomorrow night and play with fuzzing coolrunners...
<awygle> if it MAKES you happ-eeeee, it can't be that ba-a-a-aad
<azonenberg_work> rqou: also see pm
<whitequark> how many coolrunners do you have
<azonenberg_work> whitequark: i probably have a dozen or two sitting around to play with
<azonenberg_work> i know i have a decent number of 32a/64a
<awygle> cuantos coolrunners tiene usted?
<azonenberg_work> i may only have one each of the largers
<whitequark> lol i just found out that mouser doesnt sell coolrunners to russia
<azonenberg_work> whitequark: lolwut?
<azonenberg_work> export controls on that?
<whitequark> Due to US Government export regulations, Mouser is unable to sell this product in your country.
<whitequark> on XC2C64A
<whitequark> waait, no
<awygle> speaking of "a general policy of no fun"
<whitequark> to... hong kong?
<whitequark> i'm not sure if they do it by ip or by country selector
<whitequark> hong kong would be even weir--- hang on
<whitequark> didn't the fruit blather something about export restrictions
<whitequark> this is extremely hilarious because it -comes from china-
<whitequark> it's on a devboard by seeedstudio
<awygle> wow lol
<azonenberg_work> whitequark: yeah the weirdest things are export controlled
<whitequark> anyway its not like russians wouldnt be able to import it in violation of export control
<awygle> azonenberg_work: do we have anything resembling a schedule for tomorrow?
<whitequark> dumbest idea ever
<azonenberg_work> like, i'm pretty sure that a little piece of rubber that you slide over the grip of a pistol to make it easier to grab with sweaty hands
<azonenberg_work> is ITAR controlled
<azonenberg_work> because it's part of a weapons system
<whitequark> lol ITAR
<azonenberg_work> awygle: It seems like people from work will mostly be showing up around noon
<azonenberg_work> rqou will be around all weekend
<awygle> like a head cold :p
<azonenberg_work> I'm considering swinging by the pistol range on bainbridge earlier in the day (they open at 9am) since i havent gone in so long
<azonenberg_work> If you show up early you're welcome to join
<awygle> thanks but no thanks. i'm gonna sleep in lol.
<azonenberg_work> Alternatively if people show up early and want to build things we can go to the house earlier
<azonenberg_work> or that
<awygle> well since sun doesn't set til like, 9pm, if you want me around for the post-construction hackathon i need my beauty sleep :p
<azonenberg_work> Lol
<azonenberg_work> Well as a general rule i wrap up construction at the place aroudn 9ish (we can do earlier if people are tired) so as to not disturb neighbors
<whitequark> holy shit
<whitequark> someone does construction responsibly
<azonenberg_work> whitequark: i've lived in quite a few plaecs where the neighbors were assholes and didnt get along with us at all
<whitequark> i'm pretty sure that if i'd lived in the us and people did construction like they do in ru i'd have already shot somebody
<azonenberg_work> As long as i'm getting a fresh start i dont want to get off on the wrong foot
<whitequark> i'm not sure if that's an argument for or against gun ownership
<azonenberg_work> i'll sometimes work later doing quiet work like cleaning or pulling wiresi n conduit etc
<azonenberg_work> but no loud hammering, power tools, etc
<whitequark> russians -love- channeling walls
<whitequark> favorite national pastime
<whitequark> i think at my previous-previous place people channeled walls for something like 2 to 3 months every day
<whitequark> i'm not actually sure if there was any wall left
<awygle> They are building a park across the street and they start the jackhammers at like 630am
<awygle> But then I'm pretty sure they don't work past like 1pm
<awygle> Infuriating