<awygle>
i really don't mind that freenode occasionally just kicks me for no reason, but i wish recovering to a good state wasn't such a pita
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<pie_>
rqou, dod you get youre....Project Chibi Board yet?
<pie_>
*puts on sunglasses* YEAHHHHHHHHH
<pie_>
... *your
<awygle>
... why is this question csi miami worthy?
<pie_>
PCB :'(
<awygle>
Ohhhh
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<awygle>
Looking at tinyfpga 's EX assembly pictures has me wondering if there's a way to make them useful as brain boards for something like a 1x PCIe development card
<awygle>
"very short USB C-to-C cable" seems a bit inelegant lol
<prpplague>
awygle: curious what you would use as the pcie interface to it
<awygle>
prpplague: well the EX has high speed serdes sufficient for PCIe 1.1, maybe 2.0. Or did you mean on the host side?
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<prpplague>
awygle: yea, i was just curious if you were going to use the serdes or if you were going to do something like a pcie to gpio chipset
<awygle>
prpplague: I'd like to use the serdes. I know TI has a 1.1 chipset but it seems both more expensive and more complicated than serdes direct
<prpplague>
yea
<awygle>
The obvious board to board solutions like smp or qsh tend to be pretty expensive tho
<awygle>
And you can't play castellated hole games when it's a double sided board (which of course it has to be)
<awygle>
Probably better to reuse much of the schematic and layout on a new board. Kind of a bummer tho.
<rqou>
the glass weave pitch isn't as fine as i expected
<rqou>
you can see very faint squares
<awygle>
yup
<awygle>
iirc there's actually some measurable anisotropy?
<rqou>
yeah, but i doubt i care (yet)
<rqou>
i'm not trying to build a 100g switch or anything like that (*cough* *cough*)
<awygle>
:p
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<awygle>
whitequark: just sounding you out - are you at all interested in extracting the platform gui abstraction stuff in solvesepace into a separate library? would you entertain a pr doing that?
<awygle>
(perhaps not immediately, i'm aware it's days old)
<whitequark>
awygle: you can literally just copy the platform/gui* files somewhere
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<awygle>
yeah, it's just appealing to get bug fixes and enhancements "automatically"
<awygle>
if you're not interested that's probably what I'll do for my next software project, just copy the files
<whitequark>
you'll also get solvespace-specific refactoring "automatically"
<whitequark>
it sits in the same repo so that I can apply refactoring in the same commit to all the parts
<awygle>
yeah but you're conscientious, you'd separate concerns diligently lol. I am aware this would be a net negative for you maintainability wise, just thought I'd ask
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<rqou>
hmm i figured out why a bunch of max v chips have die pads that are unbonded in any package
<rqou>
they're bonded in a max ii package
<sorear>
Do they do anything interesting?
<rqou>
i mean, it exists?
<rqou>
if you can decap the chip you can get a probe on it?
<rqou>
sorry idk what kind of answer you were looking for
<sorear>
I mean like are they I/Os or is this an ice40 TRESET situation?
<rqou>
idk about TRESET, but it's just a boring unbonded IO
<rqou>
offtopic: i <3 tile molester for doing bitstream RE
<rqou>
really convenient if you're just messing around and guessing
<pie_>
is that the name of your fuzzer
<pie_>
tile molester
<pie_>
or wut
<pie_>
xD
<rqou>
no, it's a tool from the rom hacking scene
<pie_>
ah
<rqou>
good for turning binary files into images
<pie_>
i was going all, yes lolita, no touch
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<rqou>
azonenberg: ping?
<rqou>
diamondman: ping
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<rqou>
i really need some kind of jtag thing for max v
<rqou>
don't make me write a giant hack to output SVFs
<azonenberg>
i have zero time to work on anything
<azonenberg>
i'm moving out in a week
<azonenberg>
my lab will be in boxes for probably a month after that
<rqou>
the only bit of weirdness is those bits just to the right of the cutout
<rqou>
azonenberg: i also wanted to ask you the usual question of "how's your friggin house coming along"
<azonenberg>
We hung more insulation and moved a bunch of electrical boxes today, also fixed a few miscellaneous small things that had been put off for too long
<azonenberg>
Sheetrock shows up monday so thats the new deadline to get it ready
<azonenberg>
But i'm also busy boxing up all of the stuff in the house
<rqou>
oh, you got it fixed?
<azonenberg>
yes, finally
<azonenberg>
delivery is confirmed with the vendor
<rqou>
did you end up expressing immense displeasure at them? :P
<azonenberg>
Yes :p
<azonenberg>
But i'm also so overloaded i barely have time to think about anything now
<azonenberg>
the only reason i'm even on the computer is because thats where my spreadsheet full of "what's in each box" lives
<rqou>
oh wow, that's better than when i moved
<rqou>
my procedure was "are there any items left in this room? yes/no"
<rqou>
azonenberg: have time for random speculation?
<azonenberg>
lol
<azonenberg>
well all of my boxes still have numbers written on them from the last move
<azonenberg>
and i still have the same google doc
<rqou>
oh goddammit
<azonenberg>
Some boxes (4" wafer prober, for example, or some textbooks) never got opened
<azonenberg>
So those lines never got touched
<azonenberg>
The ones i opened and unpacked just need to be redone
<azonenberg>
And some stuff isn't going in numbered boxes because i'm moving it as just a single object by itself
<azonenberg>
like furniture
<azonenberg>
I booked a month at a hotel a few minutes from the new house so that should (hopefully) see us through to the end of it
<azonenberg>
couldnt find any short term apartments on short notice
<azonenberg>
the best i found wanted a multi month lease and wasnt available until mid july
<azonenberg>
mid augusT*
<rqou>
how much does it cost to book a hotel for a month lol?
<rqou>
do you get discounts for doing that?
<azonenberg>
It's comparable to what i'm paying in rent + utilities here iirc, but for a single room :p
<azonenberg>
maybe a little bit more
<azonenberg>
i think 85 a night which comes out to around 3k/mo
<azonenberg>
the daily rate is over 100 a night, this is the discount for an extended stay
<rqou>
ah, so there is a discount of some kind
<azonenberg>
Yeah
<rqou>
anyways, back to the speculation i wanted to ask you about
<azonenberg>
branch not taken
<azonenberg>
:p
<pie_>
i guess hotels are EZ if you pay 3k/mo ... xD
<rqou>
i poked at altera's PCNs, and apparently max v and max ii are made on _the same fab_
<azonenberg>
rqou: same process?
<rqou>
i think so?
<rqou>
why did they even bother changing anything?
<azonenberg>
not entirely sure, lol
<azonenberg>
pie_: well i'm paying 2.5k a month in rent now
<azonenberg>
for a *house*
<rqou>
they were previously different fabs but became the same fab
<azonenberg>
3k a month for a *room* is not ideal
<azonenberg>
But when you need a place to stay now, not in a few weeks, there are not a lot of options
<rqou>
pie_: remember that azonenberg isn't quite in the SF bay :P
<sorear>
Need a new “model year”?
<azonenberg>
The housing shortage here isn't quite as bad as SF but it's close
<rqou>
i don't think you semi-regularly see news about students at $FANCY_SCHOOL being homeless up there
<rqou>
(yes, this happens)
<rqou>
('murca)
<azonenberg>
there was a guy at GOOG who was famous for living out of a truck
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[X-Scale] is now known as X-Scale
<bubble_buster>
?
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<rqou>
azonenberg: what do you think of adding a "upgrade to EU edition" script to xc2par? would it be ok or potentially interpreted as acknowledgement that you had violated the EULA at least once?
<daveshah>
rqou: don't forget an IP address check :P
<rqou>
nah, this isn't for GPDR :P
<daveshah>
Please attach a scan of your EU passport and proof of an EU address
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<awygle>
"please attach a scan of your American passport. Congratulations, you've been locked out of this feature"
<rqou>
lolol
<rqou>
but that requires somebody to build tensorflow-rs first :P
<daveshah>
For security you should just require a fax of the passport, so it can't be haxored
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<daveshah>
just found this interesting Lattice "nice try"
<rqou>
somehow Debian managed to work properly most of the time
<daveshah>
Even Arch does a much better job
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<openfpga-bot>
[jtaghal] azonenberg pushed 1 new commit to master: https://git.io/fNCjY
<openfpga-bot>
jtaghal/master 2a36739 Andrew Zonenberg: Initial ARM7TDMI-S class structure
<rqou>
wtf azonenberg why are you still dealing with arm7tdmi?
<azonenberg_work>
rqou: I'm going through devkits around the lab and adding basic class hierarchy and "at least show me what all the coresight IP is, even if you can't talk to it yet"
<rqou>
and you have an arm7 somehow?
<azonenberg_work>
we have a Tegra Jetson X1 board that has a quad core A57 and an ARM7TDMI that homebrew forums suggest is used for secure boot or something
<azonenberg_work>
interestingly enough the arm7 is so old it doesn't support coresight
<rqou>
yes that's correct
<azonenberg_work>
so there's an ADIv5 DAP and a separate jtag tap for the arm7
<rqou>
although secure boot is pwned
<rqou>
wait azonenberg why didn't you help us find the exploit?
<azonenberg_work>
rqou: we had a team at ioa looking at the switch when it first came out but the public break happened first
<rqou>
i can't believe we all missed it
<azonenberg_work>
once it was broken there was no point in poking more
<azonenberg_work>
So the devkit kinda sat around
<azonenberg_work>
but its a perfectly useable quad core arm board
<rqou>
unlike mine that is missing decoupling caps?
<cyrozap>
azonenberg_work: There wasn't any CPU at all--everything is connected to the FPGA. The FPGA basically did PCIe-over-Ethernet (well, UDP) and exposed each of the peripherals connected to it (display output, USB, audio, etc.) to the VM.
<azonenberg_work>
cyrozap: oh awesome
<azonenberg_work>
that soudns pretty similar to what i wanted, except rather than being raw pcie etc
<azonenberg_work>
i wanted to do VNC
<rqou>
anyways, <drama> i certainly don't condone transphobic attacks, but people who love embargos and then go and call people "unethical" get very few sympathies from me
<cyrozap>
azonenberg_work: Yeah, with the Pano's, most of the complexity is on the host software side, and each client is just a remotely-addressable collection of memory-mapped peripherals. This avoids the need to build complex state machines in the hardware.
<azonenberg_work>
yeah but it seems like it could have security issues
<azonenberg_work>
in particular risk of a badusb-style attack against clientside stuff
<azonenberg_work>
i wanted to make something that implemented the usb hid host in hardware and just moved ascii text or scan codes or something
<cyrozap>
And of course that all worked because the devices were being managed by software running on the VM server/host--they can't run standalone at all.
<cyrozap>
Oh, yeah, but even besides badUSB jus having a remote PCIe device is a potential security issue in itself, especially if it's neither encrypted nor authenticated.
<daveshah>
Hrm, that sounds very questionable
<azonenberg_work>
lol yes
<azonenberg_work>
My goal was to have the network protocol be a strict subset of VNC (i.e. many fancy modes not supported)
<azonenberg_work>
basicaly mouse and keystroke input one way and pixels the other
<azonenberg_work>
With optional crypto over the link
<azonenberg_work>
probably using something lightweight like SSP21 instead of full TLS
<cyrozap>
If I were to build something like that, I'd do the all the I/O networking over Wireguard. The packet format is simple enough for an FPGA to parse and generate (e.g., it runs over UDP), the protocol overall is mostly stateless, and I wouldn't have to write my own server for it.
<azonenberg_work>
Are you familir with SSP21?
<cyrozap>
I've never heard of it until just now.
<azonenberg_work>
it's meant for low resourced SCADA devices
<azonenberg_work>
i've wanted to make an FPGA implementation for a while
<azonenberg_work>
talked to the guys when they first announced it but havent had time
<cyrozap>
That gives me great confidence in it's security. /s
<azonenberg_work>
They've actually done pretty extensive analysis on it
<azonenberg_work>
cyrozap: LLNL did a lot of the security work for it
<rqou>
whitequark: ktemkin was calling "people who would be willing to drop zero-days like the Tegra X1 bootrom bug" unethical
<cyrozap>
azonenberg_work: Well maybe if you do an FPGA implimentation you'll discover something nasty about it :)
<azonenberg_work>
cyrozap: lol
<azonenberg_work>
the protocol looked simple enough that i am confident i can implement it
<azonenberg_work>
the hardest part is probably going to be the crypto
<azonenberg_work>
they use curve25519 and i don't think there's any f/oss FPGA implementations of it
<awygle>
the problem with going not-TLS is that you lose compatibility with ~all software immediately.
<azonenberg_work>
yes, but it also means i dont have to deal with x.509 etc :p
<azonenberg_work>
and you could easily implement ssp21 as a tunnel then run whatever you want on the other side in cleartext
<azonenberg_work>
that was in fact a design goal, "bump in the wire" mode as they call it
<azonenberg_work>
to retrofit legacy cleartext protocols
<awygle>
should hack ssp21 into idk, tightvnc lol
<azonenberg_work>
lol its a possibility but i need an implementation first and its low on my priority list for now :p
<cyrozap>
azonenberg_work: lol Wireguard also uses curve25519, so if you write a core for that I'd be very interested in it. It also uses BLAKE2s (which thankfully I'm somewhat familiar with), ChaCha20, and Poly1305.
<cyrozap>
awygle: That's partly why I'd use Wireguard--there's already a kernel module for it and it'd let me talk to whatever I want over plain-old IP.
<awygle>
sounds reasonable
* awygle
is almost totally ignorant in this area
<awygle>
something something ipsec
<cyrozap>
And then I'd probably use Wishbone-over-Ethernet-over-Wireguard-over-Ethernet and drive the memory-mapped peripherals directly from the PC.
<awygle>
i know we've sort of talked about this in the past but has anybody here played with Elmer, OpenEMS, or MMTL?
<sorear>
"no f/oss curve25519 modules" is, actually pretty surprising?
<azonenberg_work>
sorear: everyone seems to use the canonical C reference implementation in libsodium
<azonenberg_work>
if anyone is doing it in hardware they're not sharing
<azonenberg_work>
But it's been aw hile since i last looked, someone may have done one recently
<sorear>
does ssp21 use x25519 (kex) ed25519 (signature) or both?
<cyrozap>
Personally I don't think I'd be comfortable implelenting my own crypto core.
<cyrozap>
s/implelenting/implementing/
<azonenberg_work>
cyrozap: i'd want to get it carefully reviewed before using it anywhere important
<azonenberg_work>
But if i have an implementation out there, and there is no good open implementation
<azonenberg_work>
i might be able to get some folks to do reviews
<sorear>
other people might think that using a fpga to do one kex per hour is silly
<azonenberg_work>
sorear: well the point is more, i dont want any software in the code path at all
<azonenberg_work>
also, down the road i want to do some hardware VPN endpoints and other fun stuff
<azonenberg_work>
that could potentially do a lot more
<azonenberg_work>
i also dont remember if i ever made an fpga aes implementation but i need one of those at some point too
<azonenberg_work>
that's a lot easier to do right in hardware than software
<awygle>
or meep
<azonenberg_work>
because O(1) timing in hardware is so easy
<azonenberg_work>
and timing side channels are the main weakness in software AES implementations
<sorear>
a low-resource x25519 core is going to bear a strong resemblance to a cpu
<sorear>
so it matters how you personally define "i dont want any software"
<azonenberg_work>
i don't want any turing-complete processors that have the ability to perform i/o or affect state outside of their own self
<azonenberg_work>
the crypto core should be a black box that just takes bytewise data in and out
<azonenberg_work>
on some kind of streaming bus
<sorear>
so in principle it wouldn't be a problem if the crypto core were literally a general-purpose cpu, as long as its inputs and outputs were limited to those of a crypto core
<azonenberg_work>
At some point, i also want to implement my crypto-optimized CPU