<trabucayre> pepijndevos: pfff. line starting with 0x3b is not my friend. This is the number of configuration data line IN the fs, not number of address in the FPGA :-/
<trabucayre> The only way to know number of line for checksum is to use line starting with 0x06 -> FPGA idcode
<trabucayre> pepijndevos: I have pushed a fix for checksum
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<pepijndevos> cool
<trabucayre> I'm waiting for your feedback :-)
<pepijndevos> Yay works!
<trabucayre> great!
<trabucayre> I'm not really happy to enumerate all gowin FPGA to have number of lines to use, but I'm not seen an alternate.
<trabucayre> pepijndevos: thanks
<pepijndevos> trabucayre, does openFPGALoader have the capability to upload a binary to external flash?
<pepijndevos> Not the bitstream, just... some binary
<trabucayre> for gowin I not added this...
<trabucayre> I need ...
<trabucayre> According to the datasheet it's seems near anlogic or lattice
<pepijndevos> So if I tell openFPGALoader to program flash, that's *internal* flash right?
<trabucayre> yep
<trabucayre> with trenz board where mode = 00 I think I must using boundary scan mode (bitbanging...)
<pepijndevos> uh sounds nasty
<pepijndevos> do you happen to know if/how the vendor programmer can do it?
<pepijndevos> it has exFlash commands, and a --spiaddr flag, but not sure how to pass the binary.
<trabucayre> good question... Never tried
<daveshah> The other option might be a 'proxy bitstream' mode like Xilinx does where you first upload a bitstream that has a JTAG-SPI bridge and then use that to program the flash
<pepijndevos> blegh that sounds painful.
<trabucayre> pepijndevos: daveshah it's painful... You've to have as much proxy as fpga model...
<pepijndevos> I'll ping Antti Lukats on Twitter if he ever dealt with this. If I do anything with the exFlash options on the programmer it tells me Error: spi flash not found
<trabucayre> I'll try first the gowin official method. Although I think this is a slow solution
* trabucayre think he must bought a truck to have all boards with him
<pepijndevos> huh... Aurora devices don't have internal flash?
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<pepijndevos> ahhh, okay... yea looking at the JTAG docs you need MODE=011 for exFlash programming, indeed except bscan
<pepijndevos> boooo
<pepijndevos> nope, still Error: spi flash not found
<pepijndevos> and there is this GAO-Bridge...
<pepijndevos> sob
<trabucayre> I will try :)
<trabucayre> maybe gowin programmer is more stupid as I think :)
<trabucayre> gowin programmer can't load bitstream where VLD is down, openFPGALoader do
<trabucayre> pepijndevos: it's really usefull to read board schematic
<trabucayre> extFlash is not in SPI interface
<pepijndevos> ohhhh, I see what you mean... the SPI flash is actually just on some random pins, not hooked up as a bitstream flash, right?
<pepijndevos> What's VLD?
<trabucayre> yep. So a proxy is mandatory
<trabucayre> VLD -> a bit in status register
<trabucayre> I've not sent a mail to ask for
<pepijndevos> :(((
<trabucayre> for xilinx or intel, it's possible to access bitstream through jtag (user mode)
<trabucayre> it's not clear if it's possible here
<pepijndevos> I've seen it mentioned in the programming manual that the "B"?? version of the FPGA can keep running the design while JTAG is doing stuff. Sounds interesting
<trabucayre> a solution is to use FT2232 interface B
<trabucayre> it's transparent mode ?
<pepijndevos> yea
<trabucayre> for cyc1000 I have used a simple bitstream to connect ftdi pins to flash pins
<pepijndevos> Huh, can the ftdi also do SPI?
<trabucayre> yep
<trabucayre> i2C, jtag, SPI, fifo parallel
<trabucayre> it's a really (a bit expensive) interresting device
<trabucayre> I go back home. Will try SPI in interfaceB
<pepijndevos> Does it just create a linux spidev, or how does that work?
<pepijndevos> More mode pins XD
<trabucayre> no spidev is in kernel space, ftdi emulation in usermode
<trabucayre> sorry comment are in french :-/
<pepijndevos> oh I see..
<pepijndevos> Hrm, this setup is completely unique on the TEC0117 right... so maybe doesn't make that much sense for openFPGALoader to support it
<trabucayre> I'have done the same thing for cyc1000 and not happy because it's unique it's true
<pepijndevos> Maybe I'll hack something up with https://github.com/eblot/pyspiflash/ and LiteX
<pepijndevos> But if you want to add it to OpenFPGALoader that would save me a lot of trouble hehe
<trabucayre> I can ;-)
<trabucayre> An alternate way is to use openFPGALoader in spi mode
<trabucayre> it's something I want to do for a long time
<pepijndevos> what does that mean
<trabucayre> instead of using jtag to access to the flash it's possible to use SPI.
<trabucayre> 1/ openFPGALoader to load a bridge in SRAM (jtag)
<pepijndevos> ahh yea, that part is pretty generic. Only the bitstream is special.
<trabucayre> 2/ openFPGALoader to write bitstream through FPGA (spi)
<pepijndevos> I love it.
<trabucayre> Maybe I need to create a patreon profile :)
<pepijndevos> Why not :)
<trabucayre> With french law I'm not sure it's a compatible with a full-time day job...
<trabucayre> there are no bscan equivalent in gowin FPGA?
<pepijndevos> what do you mean? the programmer does appear to advertise bscan modes
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<trabucayre> with xilinx or intel, it's possible to use jtag with code in FPGA
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