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<azonenberg>
soul-d: interesting
<wolfspraul>
azonenberg: I'm in this channel :-)
<wolfspraul>
decap is good, just go ahead
<wolfspraul>
I took a fpgatools holiday break, but today I'm finally back at it
<wolfspraul>
doing some work to support multiple packages (first is tqg144 and ftg256 of slx9)
<wolfspraul>
since it's the first second package, I need to rewrite/cleanup a lot of places that make fixed assumptions which now need to be variable...
<azonenberg>
wolfspraul: h/o. let me send a pic
<azonenberg>
Top metal is boring though, i warn you :P
<azonenberg>
And i need to get CMP working better to get deeper
<azonenberg>
wet etching doesnt work well on modern small process tech
<Sync>
ah speaking of which
<Sync>
I got a surplus plate and some pads from work
<azonenberg>
this is the smallest tech i've worked with yet so i may kill the first die processing it
<azonenberg>
i actually scratched the passivation pretty badly during decap but luckily it only damaged the overglass so it should be fince once i get it off
<azonenberg>
full color top-metal imagery of xc6slx4-2tqg144c
<Sync>
wee
<Sync>
I also found out last night that rectangular vacuum chambers are a damn pain
<azonenberg>
i'm not trying to RE the whole device so i'm not particularly interested in the long-haul routing
<azonenberg>
i just want to see one slice naked
<azonenberg>
So my plan is to CMP down until i can see slice boundaries, then do SEM imagery of one slice at high res
<Sync>
hmm
<Sync>
that could be interesting
<azonenberg>
Sync: i've worked iwth them before... what in particular?
<Sync>
in theory cmp is not that hard
<azonenberg>
My friend has done cmp in his lab, i have the slurry but no pads or plates etc atm
<Sync>
well, the plate material has to be insanely thick
<azonenberg>
you mean to make it super flat?
<Sync>
that is my only rant (damn physics)
<azonenberg>
oh
<azonenberg>
i thought you meant for CMP
<Sync>
yes that too but regular lathe finish should do
<Sync>
if not, lap on surface plate
<azonenberg>
Yeah, i just havent had the time to build myself any tooling yet
<azonenberg>
a little thing called a thesis is getting mad and demanding my attention :P
<Sync>
I don't seem to care much about university lately
<azonenberg>
i'm expected to publish two papers by the end of the semester
<azonenberg>
one of which i havent even started, the other is making decent progress
<azonenberg>
wolfspraul: you can usually tell (paradoxically) that a chip is using very small process tech when the top metal layer looks featureless lol
<azonenberg>
Because it means they have enough layers they can devote the top layer entirely to long-haul power routing and not do anything interesting
<Sync>
the problem is that the frist 4-5 semester here are basic courses which are insanely boring
<azonenberg>
vs something with say 3 or 5 metal layers will usually have signal routing all the way up to the top wit ha few big power buses snaking around it
<azonenberg>
and oh lol
<Sync>
kinda makes me want to give it up and climb trees full time
<Sync>
:D
<azonenberg>
lol
<azonenberg>
i just worked on my own projects and ran ahead of the curriculum
<Sync>
that does not work here
<azonenberg>
how so
<Sync>
I can only take classes that are scheduled for my number of semesters or under
<Sync>
or rather, I can go there but they will not accept my exams
<azonenberg>
lol well i meant outside the curriculum
<azonenberg>
working on my own stuff
<Sync>
yeah
<azonenberg>
but i also took advanced classes
<Sync>
I do that
<azonenberg>
if i hadnt taken crypto first semester i might have quit out of boredom :P
<Sync>
still doesn't help the boring classes I have to do
<Sync>
and climbing trees gets me 60$/h
<Sync>
I probably will study for a while, it is free so there is no pressure at all
<soul-d>
here they are reversing it making it more expensive to study