leowt changed the topic of #linux-rockchip to: Rockchip development discussion | http://linux-rockchip.info | http://irclog.whitequark.org/linux-rockchip
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<naobsd> oh, more and more patches are submitted to lkml from rockchip
<naobsd> rk3288 will be well supported arm soc? ;)
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<naobsd> I read rkchrome/uboot a little. it supports NAND via binary blob...
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<naobsd> ... and rk30xx part is dropped :(
<naobsd> I still want to use rk3188, but I want to get rk3288 too ;)
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<mrueg> naobsd: well let's hope for the best ;)
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<mmind00> naobsd: I'd say Rockchip support in mainline is about equal for rk3066,rk3188 and rk3288
<mmind00> all recently submitted drivers contain support for those
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<naobsd> mmind00: e.g. drm/lcdc/etc support code written _by rockchip_ seems to be for rk3288
<naobsd> mmind00: of course I understand that you and other developers are writing drivers for rk3[012] :)
<mmind00> according the the rk guys, the framework itself should work for all, but for the lcdc soc specific drivers will need to be added
<mmind00> I'm not sure if they will provide the necessary glue for rk3188 and before, as they no doubt will concentrate on rk3288 for the time being
<naobsd> I also think they are working hardly for rk3288 now :)
<naobsd> if code for older soc will not be provided by them, their code will be helpful
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<rperier> mmind00: hey, https://github.com/rperier/linux-rockchip/commit/4d525eab1485556d8ab5ddc075ef35954cf6f7d5 <-- almost done. So we keep the module named "arc-emac" but perhaps it would make sense to rename arc_emac_probe and arc_emac_remove to something more generic like "emac_probe". Because call these funtions from SoCs specific codes might be confusing
<naobsd> rperier: sorry for nitpicking, does RK2029 exist?
<mmind00> rperier: cool ... not sure about renaming stuff though ... as there is supposed to be nobody using the arc_emac at all ;-) ... only we could be confused ... so I don't really think it necessary
<mmind00> rperier: in your regmap_write to the grf, did you take the write-enable bits into account? (setting x+16 to one, to enable writing to the lower bits)
<rperier> naobsd: the plan here is to be able to support all rockchip socs which might require arc-emac driver and make them work
<mmind00> rperier: I guess what naobsd meant was that your 2029 needs a +=1000 ;-)
<mmind00> making it a 3029
<rperier> oh :D
<rperier> mmind00: no I did not take the write-enable bits into account
<rperier> good catch for 2029 btw
<naobsd> 3026/3028?
<rperier> mmind00: have you an example somewhere ? otherwises setting up clk and phy mode into the grf won't be applied ? (without these write-enable bits)
<mmind00> rperier: correct ... look at the i2c driver again:
<mmind00> value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
<rperier> this is what I was looking
<mmind00> so in your case, writing bits 0 and 1 of the grf, you'll need BIT(17) | BIT(16) as writemask in your value
<mmind00> so in rockchip_grf_set_phy_speed:
<mmind00> data |= GRF_SPEED_10M;
<mmind00> switch (speed) {
<mmind00> data = BIT(17) | BIT(16);
<mmind00> ...
<mmind00> }
<mmind00> etc
<rperier> mhhhh ... I see. This is why you said "x + 16" above where x is the bit you're changing
<rperier> ok thanks, I will write a fix
<rperier> ;)
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<dlezcano> mmind00: did you remove the 3.7-next/rk3288 branch ?
<dlezcano> mmind00: hi by the way :)
<mmind00> hi Daniel ... not that I know of :-)
<dlezcano> mmind00: weird, I just refreshed my web page and the branch appeared again ...
<mmind00> dlezcano: yeah, I had this in the past too
<dlezcano> mmind00: ah, ok. Probably a gitweb problem
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<ferric> guys, what processor is this board using? http://gtvhacker.com/images/f/f9/ADT1_Teardown_Board_Top.jpg
<ferric> looks like an nvidia tegra maybe?
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