Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
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<wens> jmcneill: haven't started with AC100, but you could use any property if you're doing a custom platform driver
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<wens> AneoX: probably timing issues?
<AneoX> wens: how to check it? i have tried 400khz clock, the same errors
<wens> mmc_set_mod_clk() also sets the delays
<wens> you might want to check against a vendor kernel?
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<AneoX> delay i tried to increase, no effect
<AneoX> now i found A13 board, olinuxino micro, connect emmc on sdc0, made u-boot, burn, and it works. Looks like only sun7i u-boot bug
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<AneoX> A13 vs A20 uboot boot log diff, emmc boot https://www.diffchecker.com/XrmlaZfH
<AneoX> any ideas? please, help( a13 boots, a20 no. tried on several boards
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<wens> problem is pretty much no one has a board with the earlier socs and emmc
<AneoX> my board has it. But i desolder nand from marsboardA20(has pads for emmc and nand, but dont have external pullups on data lines, easy to add) and cubieboard2(easy to solder on sd2 slot pads) and solder wires to emmc breadboard, for tests
<wens> my point is normal people dont do these modifications
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<rellla> i suppose there is a libmali available for chip, which is at least distributeable be ntc? https://bbs.nextthing.co/t/c-h-i-p-pocketc-h-i-p-in-stock-for-the-holidays-3d-acceleration-alpha/11108
<rellla> anyone familiar with that?
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<wens> h3 is singing
<jski> :D
<jski> what song?
<wens> jazz~
<jski> ooo that jazz
<apritzel> wens: wohoo!
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<wens> orange pi pc's audio jack has L/R reversed :/
<jski> so R/L :)
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<montjoie> does H3 have really R_PCRM ? I see it in memory map but nothing in user manual
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<montjoie> I need it to enable OSC16Mhz for CE TRNG
<montjoie> according to A83T user manual about TRNG
<montjoie> Needing to cross read user manual for Crypto Engine is a pain
<wens> montjoie: it probably does
<wens> montjoie: allwinner is not known for providing complete docs
<montjoie> I will try dump the memory and check it against default values
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<montjoie> it didnt work, the 16Mhz OSC register is RO
<wens> the datasheet doesn't mention any specific needs for the TRNG on H3?
<montjoie> nothing
<montjoie> and clearly the output is not random
<wens> interesting, the new crytpo engine actually does task management
<montjoie> yes it is better than SS, but with a enormous lack of information
<montjoie> I try to play also with the Secure CE, but didnt work (need to learn more about trustzone)
<mripard> you can't use anything secure from Linux
<wens> montjoie: it won't work, given we boot the H3 with PSCI enabled, so linux is in non-secure world
<wens> looking at the task ids, the h3 should be v3 of the crypto engine if you're looking at allwinner kernel sources
<montjoie> yes I looked at it, but they clearly didnt test their code
<montjoie> doing RSA like AES:)
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<miasma> wens: does it have a decent sound quality
<miasma> i bought a $6 dac for my opi pc
<miasma> probably still better
<wens> i guess its ok?
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<KotCzarny> wens, no usb activity interference?
<wens> KotCzarny: i'm not using usb, but good point
<KotCzarny> just connect any usb wifi card and run some ping -s 15000 in the same time open audio device
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<wens> sounds ok
<wens> using a usb ethernet dongle though
<wens> and i'm using headphones instead of loudspeakers
<apritzel> The A64 has an arch timer silicon bug, sometimes it runs backwards :-(
<wens> o.O
<wens> apritzel: btw, we should be able to switch to the arch timer in u-boot for the newer SoCs, right?
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<apritzel> wens: you mean for v7?
<apritzel> H3, for instance?
<apritzel> wens: I think so, don't we use it already?
<wens> apritzel: nope, it's not enabled for u-boot proper
<apritzel> Credits go to Theobroma for digging this out
<wens> afaik there can be only one timer driver enabled, and we use the sunxi timer
<wens> the arch timer on a64 is mmio?
<apritzel> wens: there are two interfaces, sysreg and mmio
<wens> yes i know
<apritzel> normally everyone uses the sysreg interface
<apritzel> that works even on EL0
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<apritzel> wens: I don't think that the A64 implements the mmio interface, at least I couldn't find anything in the manual
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<wens> hmm, seems i misread the code
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<ssvb> apritzel: is this arch timer is an ARM IP?
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<apritzel> ssvb: no, the _interface_ part is part of the Cortex-IP
<apritzel> but every integrator has to provide actual timer IP to back this interface
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<ssvb> apritzel: BTW, have you tried the CONFIG_SYS_FSL_ERRATUM_A008585 workaround just in case?
<apritzel> ssvb: I haven't tried, but yes, that should fix it
<apritzel> I have that other U-Boot patch that papers over it
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<ssvb> my understanding is that it seems to address a non-atomic updates of the lower/upper timer register halves
<apritzel> but I still see some message from the EHCI controller
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<apritzel> ssvb: yes, that seems to be a common pitfall on wiring up a timer to the arch timer interface
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<apritzel> ssvb: though the issues I see are not confined to the two 32-bit halves only
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<apritzel> ssvb: actually it looks more like a bit-serial issue
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<ssvb> very nice
<ssvb> NOR flash(8Mb)
<tkaiser> ssvb: Yes, I hope this will start a trend to solve the chicken-egg problem rather sooner than later.
<KotCzarny> hmm, 24usd
<KotCzarny> funky chip placement, hehe
<KotCzarny> nor flash? o.O
<KotCzarny> why not emmc?
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<tkaiser> KotCzarny: SPI flash costs nothing but could be pre-populated with device specific u-boot
<ssvb> at the current exchange rate, it's under 22 EUR with shipping price included, and under the EU VAT exempt threshold :-)
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<tkaiser> Then all that's needed is a device agnostic OS image on SD card, eMMC, USB, NFS, whatever...
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<KotCzarny> ahm, so its not for the storage, more like boot/firmware storage
<tkaiser> KotCzarny: 8Mb is 1 MB ;)
<KotCzarny> lets hope this trend catches up
<KotCzarny> enough for uboot ;)
<tkaiser> Well, on OPi Zero and Olimex A64 board SPI _could_ be used.
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<KotCzarny> will there be a model with 2/3gb of ram?
<ssvb> and it's also very good that Xunlong provided the schematics even before starting to sell this board
<tkaiser> KotCzarny: Look at the H5 user manual regarding maximum amount of DRAM ;)
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<ssvb> is there a H5 user manual already?
<tkaiser> OPi 3 will be also H5 based, shares form factor and connector positions with Plus 2E now and will have 2 GB
<tkaiser> ssvb: not that I know of :)
<KotCzarny> doh
<KotCzarny> more confusion ;)
<tkaiser> tkaiser: I also searched for BSP snippets since there is a new repo below https://github.com/orangepi-xunlong?tab=repositories
<tkaiser> But that's just an older Armbian 3.4.112 kernel combined with 4.9 and 'sold' as OPi SDK by whoever runs http://soilhead.cn/static/orangepi/sdk-v2.html
<tkaiser> So all we have regarding H5 now is... nothing? Just the assumption that it might be sun50i2w and that the Tinalinux BSP drop might contain some working code.
<beeble> ddr3 8Gb chips are a more then double the price of 4Gb ones and a lot less common. so with only 2 landing positions i would assume they will not go into a 2GB production
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<tkaiser> beeble: Xunlong uses 4 chips on OPi 3 just like with Plus 2/2E: http://forum.armbian.com/uploads/monthly_08_2016/post-1-0-20059900-1470596910.jpg
<beeble> tkaiser: i was just looking at the aliexpress storepage you posted before
<apritzel> this IC placement looks really disturbing ...
<KotCzarny> beeble: but there are no 3gb allwinner boards, so anyone actually doing one could take the advantage
<tkaiser> apritzel: I believe it's to have some room for eMMC when 'OPi PC 2 Plus' (haha) will be released and to maintain dimensions and connector positions exactly the same as with OPi PC and PC Plus now.
<apritzel> or it's auto routing gone wild
<beeble> KotCzarny: doing 3gb is hard wihtout just throwing 1gb away :)
<tkaiser> KotCzarny: Are you aware of 6Gb or 12Gb DDR3 modules?
<beeble> apritzel: no, its just so that they can paste the layout into the given dimensions
<KotCzarny> seriously, they should just make the addons (memory, ports, wifi, etc) as a plugin modules and continue pc way
<apritzel> I think you can have exactly 3GB (TLLim hinted at that once)
<tkaiser> I send people asking for more than 1 GB DRAM always to http://www.linuxatemyram.com -- also sufficient.
<apritzel> it's just that those chips have a completely different pinout (so require a new PCB design) and are much less common
<beeble> apritzel: the placement matches exactly the room it would require for the standard ddr routing. also squeezing the realtek chip exactly in the room left. the pick and place machine doesn't care about rotation
<apritzel> beeble: yeah, I know, it's still disturbing to the eye ;-)
<KotCzarny> tkaiser: thinking of doing some vm or desktop machine requires as much ram as possible
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<apritzel> KotCzarny: I agree, for my work horse desktop I'd never go below 16GB
<tkaiser> KotCzarny: VMs with tablet or TV box SoCs? Seriously? And this 'desktop machine' thing is just a joke, isn't it?
<KotCzarny> yeah, just a dream of being able to replace x86 laptop one day
<KotCzarny> also, there are people that are packing a20 into laptop form factor already, tell eoma68 they are a joke ;)
<apritzel> KotCzarny: I wouldn't count on Allwinner SoCs for this, though ;-)
<beeble> why replace something that is working so well with drivers that are working and power managment that is realy good?
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<KotCzarny> with working display/de(en)coder drivers it would be already possible
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<KotCzarny> because smartphones do the desktopish tasks since few years
<beeble> it would still be a pain to use it as a everyday desktop
<agraf> beeble: so when did you stop to be a dreamer? :)
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<agraf> beeble: btw, remember how we talked about new thunderx servers for obs?
<ssvb> tkaiser: how can I get it asap? should I order this board now from aliexpress?
<KotCzarny> people were using i386s as a desktop machines, right?
<KotCzarny> it's just a matter of working drivers and lean software
<agraf> beeble: they're online :)
<agraf> beeble: 24 build jobs each
<beeble> agraf: since i started developing embedded hardware 10+ years ago :)
<beeble> agraf: cool
<agraf> (and 30% idle .. hmm)
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<beeble> KotCzarny: of corse it works. but you are used to other stuff then 10 years ago
<KotCzarny> but its still possible, just not the bloated software
<beeble> just look at your browser cpu and ram usage
<tkaiser> ssvb: I told Igor yesterday to add you, no answer usually means '[x] done'. I'll ask again.
<KotCzarny> yup, i know, we are spoiled
<KotCzarny> hd resolutions everywhere ;)
<tkaiser> KotCzarny: Can you tell me something even more bloated than 'the average web site in 2016'?
<beeble> oh ranting does make hungry. i will take a lunch break :)
<KotCzarny> web can be debloated, either by personal proxy (blocking/converting), no-js addon, or choosing lighter equivalents
<apritzel> agraf: now the reason for ARM naming it aarch64 is obvious: it's always first in alphabetical ordering ;-)
<agraf> apritzel: yeah ;) smart move
<agraf> apritzel: same reason "Aachen" didn't want to have the "Bad" in its name, even though it was eligible
<agraf> (random history facts...)
<apritzel> ;-)
<tkaiser> ssvb: Igor shared your address details with Steven and you get a dev sample directly (most probably OPi Zero too)
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<NiteHawk> i'd like to quickly pick your brains. what cross-compilers/-toolchains would we want to try for building ARM code (in sunxi-tools), in order from "generic" to "specific"? - my current order would be: arm-none-eabi-gcc arm-linux-gnueabihf-gcc armv7a-hardfloat-linux-gnueabi-gcc aarch64-unknown-linux-gnu-gcc
<apritzel> NiteHawk: why aarch64 in there? it can't generate ARM code, which is all we need in the sunxi-tools context, right?
<KotCzarny> is hardfloat a requirement?
<NiteHawk> hmm... valid point. i thought it would be useful, as someone reported an issue with building "target-tools" on aarch64, but it probably isn't actually useful
<NiteHawk> KotCzarny: no, good point. we don't use fp in our routines, so arm-linux-gnueabi should probably also be on that list (before the "hf" one)
<oliv3r> ssvb: is it possible that lima-memtester can cause a failure which causes a reboot?
<oliv3r> i guess it could in theory
<oliv3r> didn't think it was super likley
<KotCzarny> oliv3r: only if watchdog is used, i guess
<ssvb> oliv3r: yes, it can, but just a deadlock is more likely
<KotCzarny> or some power draw over limit
<ssvb> oliv3r: sometimes you can get kernel panic, and the kernel might be configured to reboot automatically
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<ssvb> tkaiser: Okay, thanks. Though I don't think that I'm really interested in OPi Zero
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<tkaiser> ssvb: I hope Xunlong sends out Zeros with SPI flash populated so maybe just another device to play with? Anyway: declared value remains below EU VAT redempt treshold so it shouldn't matter.
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<ssvb> tkaiser: well, but what if it gets stopped at the customs nevertheless and I would need to provide a proof?
<KotCzarny> send them aliexpress printout?
<ssvb> and for example, I don't quite understand why some aliexpress sellers declare 5$ price for something that really costs 10$, this is really annoying
<KotCzarny> and promo has ended
<KotCzarny> tell them you bought it on a promo
<KotCzarny> or with some promo points
<ssvb> KotCzarny: yeah, and the aliexpress printout would show that opi pc 2 + opi zero bundled in one parcel don't match the declared value and exceed the VAT threshold
<ssvb> why do I even need to lie?
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<KotCzarny> because declared value might not match and because we dont live in a perfect world
<KotCzarny> breakfast time
<oliv3r> ssvb: ah right of course, so its likely it froze
<tkaiser> ssvb: no need to lie, the stuff will be sent out as 'commercial sample' or something like that with an invoice claiming the value of the items. Stuff like that always gets through here without problems.
<oliv3r> ssvb: strange however that it can freeze after running for 14 hours, reboot, and then run for 12 more hours
<oliv3r> ssvb: anyway, i'm getting some interesting results
<oliv3r> if the ambient temperature is even a little above 70 degrees, it goes to hell quite easily
<oliv3r> i'm at 73.5 and it keeps crashing now even with 1 lower setting
<KotCzarny> 70C is unreasonable, and close to the borders even for industrial grade electronics
<oliv3r> 70C is the max. ambient temperature in the datasheet
<oliv3r> for non industrial use
<oliv3r> so, that's my maximum :)
<KotCzarny> remember about caps and other parts
<oliv3r> so i'm letting it cool off a little
<oliv3r> but getting it to 70 is hard :p hence 73
<KotCzarny> they could fail too, not only soc
<KotCzarny> what are operating temps for axp209?
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<KotCzarny> -40..130C
<KotCzarny> not bad
<KotCzarny> :)
<KotCzarny> though those are 'absolute maximums'
<KotCzarny> also, acin is 3.8..6.3V
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<miasma> ssvb: shouldn't be a problem usually. i got two opi pcs without paying vat
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<miasma> so what makes a board a sunxi board? i was just thinking if I add more boards to the wiki's table, which boards are sunxi branded
<miasma> all allwinner based?
<KotCzarny> yup
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<KotCzarny> allwinner soc
<miasma> ok so i'll add opi pc 2 and zero
<wens> hehe, a bit late to be asking this?
<miasma> i thought it was obvious, never read it anywhere
<miasma> just wanted to make sure
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<tkaiser> miasma: Schematics and schanetics for both boards are already uploaded :)
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<miasma> that's quick
<miasma> is the tv out in opi zero composite?
<tkaiser> miasma: Sure, it's just one pin.
<tkaiser> Would be great to have 13 and 26 pin headers as tables in the wiki
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<miasma> tkaiser: yea i have to think about it. you mean on the board page?
<KotCzarny> tkaiser, i think they are already there, in generic soc pages
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<miasma> but aren't the pins board specific?
<KotCzarny> depends
<tkaiser> KotCzarny: Nope, minimal changes :( All H3 Orange Pi boards with 40 pin headers have same config, Zero is different, NanoPis are different, BPi M2+ is different
<KotCzarny> many boards tend to stick to compatibility
<miasma> i could add separate tables as a subsection on the board page and link to that from the board table
<tkaiser> miasma: This image here is valid for Oranges with 40 pin header: http://linux-sunxi.org/File:Xunlong_OrangePi_expansion_header_pinout.png but Zero has not the same pin assignments on the first 26 pins but differs slightly.
<miasma> right
<miasma> i suspect some other boards might also have differences. e.g. the sinovoip clone for banana pro has two pins mixed up
<tkaiser> miasma: They're the worst since they provide even wrong 'hardware descriptions' (fex file, DT) for their own hardware.
<tkaiser> The various FriendlyARM H3 devices are documented well in their own wiki
<miasma> i accidently bought one. it was quite cheap. now it reboots randomly
<KotCzarny> miasma, did you check power source quality and temperature?
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<KotCzarny> s/temperature/core voltages/
<KotCzarny> those are two main reasons for lockups
<KotCzarny> and third being too high dram speed
<miasma> KotCzarny: i'll need to retest that board some time. yea i could try a lower ram speed
<miasma> I guess these boards are going to have lpddr4 memory sometime soon ? samsung already has 8 GB chips iirc
<miasma> KotCzarny: i couldn't figure out which kernel module enables temperature monitoring on a20/banana pro
<miasma> would it work via lmsensors?
<KotCzarny> on mainline? you need to patch it
<miasma> oh
<KotCzarny> ahm, temperature, no, it should be already there
<miasma> i had my own kernel so i didn't want to enable all temp drivers
<KotCzarny> for voltages/amperages you have to patch it
<KotCzarny> want my bpi-r1 .config?
<miasma> i can take a look
<ssvb> tkaiser: the pins on the expansion header can't be exactly the same, because in Orange Pi PC 2 the SPI0 pins are now used by the on-board SPI flash
<miasma> thanks
<tkaiser> ssvb: Sure but that's the reason GPIO header pinout should be included in device pages in wiki.
<nove> mripard: again here i am to complain about something you wrote in one of your ELEC talks, in page 22 http://events.linuxfoundation.org/sites/events/files/slides/ripard-v4l.pdf, you have "Encoding is not really understood right now"
<miasma> funny thing, I (and some other guy) tried to ask the UP board vendor about the maximum power draw per gpio pins. i think they said that there's this nda so they can't show the schematics but they can answer single requests
<nove> mripard: i am sorry to tell but this is not right, and you know it
<KotCzarny> lol
<KotCzarny> super secret board designs
<miasma> for example i wanted to power a 120mm fan from the gpio pins. they didn't want to tell how much power i can draw from GND--5V
<nove> mripard: all the information to have usable h264 and jpeg encoding, already exists from january of 2014, as everyone can see from here http://linux-sunxi.org/CedarX/Reverse_Engineering with register information added in the wiki at the same time
<nove> mripard: so i don't see what do you aim by saying "Encoding is not really understood right now"
<miasma> tkaiser: editing tables with mediawiki is such a pita. maybe there's some import/export feature :P
<nove> (to see the ELEC videos need registration, so much for openness)
<KotCzarny> see the 'other table editors'
<KotCzarny> but i guess it's easily doable with a bit of scripting or even bash scripting
<miasma> i suppose. too bad it's not integrated yet
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<mripard> nove: I don't know, I looked at https://linux-sunxi.org/Cedrus#Supported_codec_matrix
<nove> wens: thanks
<wens> nice table
<nove> (i will see the video)
<mripard> nove: maybe it's just a misunderstanding, but on h264 it really doesn't look like it's fully understood.
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<nove> mripard: because it misses B frames? we don't even know if the hardware really supports this, as any allwinner documentation is to be trusted
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<mripard> then sorry, it was a misunderstanding
<nove> mripard: but still with I and P frames in more that enough to have usable encoding, and this doesn't deseres the statement of "Encoding is not really understood right now"
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<nove> mripard: is the chicken and the egg problem, nothing will be done if "everyone" keeps putting down the work of others, because is not 100% perfect
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<nove> if B-frames are wished, or any other feature "still not understood" is only need to ask, and given a valid reason for why the work should be done
<nove> and if that reason is to have support in mainline, then it will be more than valid
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<mripard> nove: I'm sorry, but I'm pretty sure I never put down any of the cedrus work.
<mripard> you all did an awesome work
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<miasma> tkaiser: um is the SATA* text only reserved for crappy usb->sata adapters in the board table?
<tkaiser> miasma: board table?
<miasma> " SATA marked with * means crappy usb-to-sata converter which will result in crappy performance (~15-20MB/s, less if usb is used at the same time) "
<miasma> i've got more than 30 MB/s with an external $2 usb-sata adapter so maybe there should be some other text for non-crap models :)
<KotCzarny> miasma: well, you can make it [1] and add [2] if you need more comments
<miasma> right
<nove> mripard: finished seeing the video, and what you said matches the text, and you know who we are and could simply ask us first
<KotCzarny> but external usb adapters arent really fitting to that page
<nove> mripard: but ok
<KotCzarny> its about what comes with boards
<KotCzarny> and gl830 is the thing that gets soldered on (for some reason)
<miasma> KotCzarny: my point was, if the board comes with a good usb-sata bridge onboard, there's no category for that. there's only native sata and crappy usb/sata :D
<KotCzarny> yup, because there are no such cases yet
<miasma> hm i see
<miasma> what if I change the meaning of SATA* so that it's a usb-sata bridge and add [1] for those with sub-optimal performance. this way the board would also support the good chips with 35+ MB/s of bandwidth. if there ever will be those
<KotCzarny> we will see when we get at least one board
<miasma> :)
<KotCzarny> imo for now its enough for people to know they are getting crap sata performance
<miasma> yea
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<KotCzarny> and if we get new usb-sata chip, we have yet to see if its not crap
<KotCzarny> tkaiser: how about hinting steven from xunlong to find good uas chip?
<KotCzarny> even better, 2 of them ;)
<KotCzarny> i mean including 2 sata ports
<miasma> it shouldn't be too hard because i get 37 MB/s from an external usb-sata adapter which only costs $2
<KotCzarny> 2$ is ~10% of the price of many boards
<miasma> yea with it comes with tons of plastic, two leds and the cables
<miasma> i suppose the chip is a lot cheaper. and this is the end user price
<beeble> miasma: whats inside jmicro?
<beeble> jmicron
<miasma> 14cd:6116 Super Top M6116 SATA Bridge
<miasma> it works for me, but some have had issues with it
<KotCzarny> miasma: i think its possible to reach ~40MB/s with good uasp chip
<miasma> probably. also that was read speed. i haven't written anything with it :)
<tkaiser> KotCzarny: I would prefer to see a R40 board from Xunlong instead of USB-to-SATA
<tkaiser> But according to rumours he's working on a non-sunxi board with native SATA and IIRC also PCIe
<KotCzarny> tkasier, nice, marvel?
<tkaiser> No idea, maybe MediaTek, maybe RealTek
<KotCzarny> kernel 4.1.2 seems old, care to retest?
<miasma> do you know if it's ok to copy the gpio pin data from vendor's diagrams into a table or are there some copyright issues
<KotCzarny> miasma: definitely not from anything sinovoip related ;)
<KotCzarny> and if you do, add a note of the source
<KotCzarny> and its not about copyright but reliability
<tkaiser> miasma: For FA boards I would simply put a link to their Wiki (since with NanoPI NEO for example they exchanged pinout between PCB rev 1.0 und later)
<KotCzarny> and afaik such kind if information is hardly copyrighted, what next nda for usb4 ?
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<nove> and speaking again of the "no B frames" that colorful table is split in two sides the "no B frames" is at the software side, it is the simple PoC software that doesn't implement this feature
<KotCzarny> time to update the page then?
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<nove> because it requires (if i remember correctly) a more complex buffer handling (i am not the right person to talk about this), but we know how the hardware works
<nove> yes, maybe should be two separated tables to make very clear
<KotCzarny> make poc part completely out into separate paragraph
<KotCzarny> or even better subpage?
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<nove> yes something like that
<nove> (more things to do when there is the time, which is not today)
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<nove> and the "baseline profile only" is a hardware limitation, (not knowledge)
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<nove> in newer versions of the video engine, there are "hits" that there is support for high profile, but there isn't anything confirmed, that is why the red
<nove> this "hits" are to not be much trusted, as there is also "hits" for vp8 encoding, which i don't believe until i see for myself the hardware doing it
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<majosa> Eh, I didn't want highlight that NES mini is a closed platform but highlight that is a board with an Allwinner R16 with 256Mb of RAM and 512Mb of FLASH
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<|Jeroen|> would be nice it there is a 10$ clone of that box :p
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<KotCzarny> 256megabit of ram?
<KotCzarny> :>
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<fire219_> oh, the nes mini is an AW board? cool
<fire219_> 256MB is obviously less than cool, but a hell of a lot more than an NES had ;)
<diego71> KotCzarny: enough for an emulator ...
<KotCzarny> im just having fun of Mb vs MB (obvious typo)
<fire219_> at least it's not 256mb :)
<|Jeroen|> yeah loads :p
<fire219_> also why is there a _ after my name... probably happened when i set up znc...
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<AneoX> apritzel Hi! I have found a problem in u-boot with A20 emmc boot, it works. But now i have a problem with sunxi kernel. It doesnt init emmc on sdc0 lines, only sdc2. Looks like this is hardcoded somewhere, as you said. Do you find a solution?
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<ericxdu_> majosa: that's an interesting pedigree re: NES mini. Makes me wondes what other cheap consoles are made of
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<apritzel> AneoX: so what was the problem in U-Boot?
<apritzel> and which kernel is this exactly? 3.4.something?
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<AneoX> I didnt fully understand nature of bug, but this fix allows to boot well https://dl.dropboxusercontent.com/u/10252748/emmcFix.patch
<AneoX> Kernel wich i used is 3.4.103+
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<apritzel> sorry about the kernel, but I don't touch that old crap
<apritzel> AneoX: I could tell you what to do for the device tree, but I never touched .fex (and probably never will)
<AneoX> nice, thx, i can try mainline kernel
<apritzel> AneoX: yes, please do!
<AneoX> apritzel: if you share working device tree with me, i can try to make my own, for my custom board
<apritzel> it has nothing hardwired, you should be able to drive eMMC from every controller
<apritzel> best thing is to copy something that is close, and change that
<apritzel> so you said you changed an Olimex boards? then take that as a base
<AneoX> but what problem you have had with emmc? do you have success to make it works with sdc3?
<apritzel> AneoX: The A64 has only three MMC controllers
<apritzel> but SDC2 is a bit different: it can do 8bit and up to HS400
<apritzel> I see it being detected, the part layout is read, and I can even dd to and from it
<apritzel> but anything more fancy hangs the kernel
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<AneoX_> seems like in sunxi kernel which i used, emmc inited in sunxi_nand driver) nand pin mux only sdc2, so that is why in not working on sdc0 )
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<AneoX> apritzel: What about mali drivers in mainline kernel? Will it works? Performance?
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<apritzel> the answer is just: no
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