#linux-sunxi on 2019-02-18 — irc logs at freenode.irclog.whitequark.org

2018-08-03 10:18 rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*

00:01 <anarsoul> suprothunderbolt: you asked this question several time, if no one responds the answer is likely to be 'no'

00:02 <suprothunderbolt> anarsoul, different times / different days so thought I'd try twice :)

00:02 <suprothunderbolt> Might have to code it myself...

00:03 <suprothunderbolt> I'm deciding if the A64 is the right chip for me and this is the only major issue I've found.

00:04 <suprothunderbolt> is it worth looking into newer Allwinner chips or is the a64 at a good spot for support vs performance?

00:05 <vagrantc> depends on what you mean by performance ... it's a bit on the lower end for arm64 capable chips

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00:06 <suprothunderbolt> vagrantc, I'm mostly interested in decent mainline linux support & price vs performance

00:06 <suprothunderbolt> so if there's a chip that's the same price but better supported and faster I'll go for it, i.e H6?

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00:09 <kilobyte> note that PCIe on H6 is broken

00:10 <kilobyte> not a problem compared to A64 (no PCIe at all), but people tend to use what they get

00:10 <suprothunderbolt> features I need are OpenGL ES GPU with MIPI DSI or parallel RGB out and I2S (as many channels as possible)

00:11 <suprothunderbolt> availability as a SOM would be good

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03:34 <wens> suprothunderbolt: IIRC codekipper has some patches for that in his github repo

03:34 <wens> suprothunderbolt: the I2S TDM stuff I mean

03:36 <suprothunderbolt> oh nice. I was just a bit worried about selecting a board without knowing if a core feature for me worked :)

03:43 <wens> it's not mainline yet

03:46 <suprothunderbolt> yeah, just had a look through and I'm not sure if it support capture and playback... maybe I read it wrong though.

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08:57 <wens> xiaomi vacuum robot uses R16, and unsuprisingly hacked # https://dgiese.scripts.mit.edu/talks/DEFCON26/DEFCON26-Having_fun_with_IoT-Xiaomi.html

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09:19 <KotCzarny> wens: lol

09:34 <KotCzarny> i wonder if they have secure boot bits set

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20:55 <samrose> how can I know what physical pins these are mapping to on my device? https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts#L362

20:58 <mru> on the bananapi?

20:59 <samrose> mru yes on bananapi m64

20:59 <mru> doesn't the documentation for it say where the uart port is?

20:59 <samrose> mru: actually this is more accurate https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts?id=refs/tags/v4.20-rc7#n335

21:00 <samrose> mru: documentation says that "uart2" is on pins 8 10, however it doesn't even look like device tree has a uart2

21:01 <samrose> mru: mfr is saying here that it is uart2 https://bananapi.gitbooks.io/bpi-m64/content/en/bpi-m64gpiopindefine.html

21:03 <mru> watch out for 0-based vs 1-based numbering

21:04 <samrose> mru: ok if uart1 is actually uart2 can you help me figure out from the dts which pin I should expect this to map to?

21:07 <mru> this board? http://wiki.banana-pi.org/Banana_Pi_BPI-M64

21:07 <samrose> mru: yes that is it

21:08 <samrose> I believe I am trying to see where in the kernel source that `pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;` is defined

21:09 <mru> hmm, that wiki page mentions uart0 as well

21:10 <mru> uart1 seems to be connected to the bluetooth module

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21:10 <samrose> however in the dts I am using in 4.20.0-rc7 version of kernel there is no bluetooth defined

21:11 <mru> it's still on the actual hardware

21:11 <samrose> (which is fine as I am not using bluetooth)

21:11 <mru> so it makes sense that uart1 isn't wired to the connector

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21:11 <samrose> mru: sorry wired to which connector?

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21:12 <mru> the 40-pin one

21:12 <samrose> here's the device tree I am building now https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts?id=refs/tags/v4.20-rc7#n329

21:13 <samrose> (sorry the other link above was actually wrong)

21:14 <mru> the uart pinmux groups are defined here: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi?id=refs/tags/v4.20-rc7#n588

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21:18 <samrose> mru: thanks!

21:19 <mru> looking at the schematic, it's definitely uart2 that's connected to the pin header

21:20 <mru> the dts file is missing the pinmux setting

21:20 <mru> it'll work if u-boot already configured it

21:20 <samrose> mru: so that is uart1 in the dts?

21:20 <mru> but dts really should have it anyway

21:21 <mru> no, uart1 is the bluetooth

21:21 <samrose> Ah I see you are saying that dts is totally missing the `&uart2 ..`

21:21 <mru> right

21:22 <samrose> mru: do you know what `pins = "PB0", "PB1";` in the dtsi files maps to on the hardware?

21:23 <mru> you should add that with "pinctrl-0 = <&uart2_pins>;"

21:23 <mru> otherwise copy the &uart0 bit

21:23 <samrose> mru: ah ok

21:23 <mru> PB0 and PB1 are actual pins on the chip

21:23 <samrose> and then these should be the 8 and 10 pins on the gpio itself

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21:24 <mru> many of the pins on the chip can be mapped to different functions

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21:25 <samrose> mru: thanks a million

21:25 <samrose> I am glad I asked here

21:25 <samrose> porting nixos to this board, nearly done save for this

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