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John_K>
I still can't manage to get timing to work on S6 with DDR2
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John_K>
it seems that it's having trouble routing sys_clk at the end
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John_K>
I tried dropping it to 50MHz and still won't meet timing
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John_K>
any suggestions other than getting the GUi tools working and learning how to debug timing there?
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_florent_>
what kind if timing issues do you have?
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_florent_>
do you have a timing report from ISE?
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John_K>
I don't have GUI tools setup, so I just have the textual output of the commandline tools
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John_K>
I could get remote X setup though
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John_K>
ok I have a twx file for the design
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mithro>
xobs: BTW - Wanted to be clear that I strongly support your thoughts around making better CSRs (and the implementer gets to choose how :-)
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