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<
ysionneau >
00:07 < mwalle> mapping 0xc0 -> 0x00, isnt that mips style segments? < not sure, I copied ideas from so many arch that I don't remember each time from which I borrowed :)
09:57
<
larsc >
I think mips has 0x00 mapped at 0xa0 and 0xc0
09:57
<
larsc >
and 0xa0 is uncached while 0xc0 is cached
09:57
<
larsc >
(or the other way around)
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