<DocScrutinizer05>
I can't believe it was exactly the right addr bus pin that cracked open or got shorted, to create duplication. I've seen similar effect due to short on addr bus in 1978, but it was not that magic to yield exactly two banks of 1/2 of expected size
<DocScrutinizer05>
possible approach: doublecheck the docs for the OMAP-memcontroller, disassemble the N9 xloader
<freemangordon>
or check dmesg log on N9 :)
* freemangordon
is googling for it
<DocScrutinizer05>
I don't think the dmesg log provides arcane details how to set up the controller?
<DocScrutinizer05>
it provides proof that the chip actually should be 2 banks a 512
<freemangordon>
or 4x256
<DocScrutinizer05>
err, well, OMAP only has 2 chip select, right?
<freemangordon>
hmm, yeah
<DocScrutinizer05>
that's what we need to use to make 2 banks work. I don't think it can handle 4 banks
<DocScrutinizer05>
would be unusual to abuse addr lines for a weird chip-select of banks
<DocScrutinizer05>
you *could* use eg addr13 for CS1 and addr14 for cs2, but then the addr ranges where addr13==addr14 are both illegal and "DONT USE"
<DocScrutinizer05>
IE 01 and 10 are valid, while 11 and 00 would cause havoc
<DocScrutinizer05>
aiui
<DocScrutinizer05>
freemangordon: I think xloaders are all quite similar in the code they use for such tasks. Could you find the code in N9 xloader and disassemble it?
<freemangordon>
sure, but I want to check the docs first
<DocScrutinizer05>
:-) that's Plan-A :-D
<DocScrutinizer05>
could you help me out with a symbolic pointer so I could do same?
<DocScrutinizer05>
(without first searching several pdfs each 3000+ pages)
<freemangordon>
hmm?
<freemangordon>
oh
<DocScrutinizer05>
doc number, page
<freemangordon>
see p1297, Table 11-180. SDRC_MCFG_p
<freemangordon>
3430 TRM is that
<DocScrutinizer05>
SPRS599D ?
<freemangordon>
SWPU223M
<DocScrutinizer05>
ta :-)
<DocScrutinizer05>
dang TI searches forever, and a locate SWPU223M returns zilch
<DocScrutinizer05>
No matches found for "SWPU223M" in Technical documents
<DocScrutinizer05>
freemangordon: please doublecheck, maybe provide document full title - incl the release date
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<DocScrutinizer05>
google also never heard of that document
<DocScrutinizer05>
in p.1231 11.2.5.3.2 Memory Configuration
<DocScrutinizer05>
lemme think about >RAMSIZE 0100000000<<
<DocScrutinizer05>
looks odd
<DocScrutinizer05>
my calculator translates that to "256"decimal
<DocScrutinizer05>
so MAYBE we want RAMSIZE 1000000000 ? ;-)
<freemangordon>
it is in 2MB chunks
<DocScrutinizer05>
ooh
<freemangordon>
whatever it means
<freemangordon>
but I guess it is MBytes
<DocScrutinizer05>
sounds pretty od
<freemangordon>
not MBits
<DocScrutinizer05>
particularly since the number of digits seems identiacal to number of available addr lines somehow
<DocScrutinizer05>
and highest bit being 0
<DocScrutinizer05>
very suspicious
<freemangordon>
yep
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<DocScrutinizer05>
ok, the RAM is prolly 16bit wide
<kerio>
huh
<kerio>
let's do RAMSIZE 1000000000000
<kerio>
ez 64gb of ram
<DocScrutinizer05>
kerio: please no noise
<kerio>
k :(
<DocScrutinizer05>
kerio: sorry, we're trying to get some real work done, to make 1GB come true for you
<kerio>
<3
<DocScrutinizer05>
Nik sent a mail that he had no success so far
<DocScrutinizer05>
which is kinda odd since the chips for sure are _supposed_ to be 1GB
<kerio>
do they work if you pretend they're smaller?
<DocScrutinizer05>
freemangordon: there might be a completely different catch in this: it says >> RAMSIZE Defines the physical RAM address space in terms of 2M -byte chunks<< in Table 11-104. Memory Configuration, but who says this references to a single BANK?
<DocScrutinizer05>
the TOTAL RANSIZE of the PoP for sure should be 512 aka 0b1000000000 of 2MB chunks
<DocScrutinizer05>
which would match perfectly with max addr range of PMAP3
<DocScrutinizer05>
OMAP3 even
<DocScrutinizer05>
freemangordon: when you could provide a patched xloader sourcecode and maybe even binary to Nikolaus, you'd earn eternal fame (and more points on your "free Neo900" account :-D )
<freemangordon>
anyway, it seems that bootrom is setting DRAM
<DocScrutinizer05>
prolly my C again sucks
<freemangordon>
I parsed the hex value by hand
<DocScrutinizer05>
well, even when BOOTROM does that, _and_ does it wrong maybe (who lnows what cheesy ROMBOOT TI flashed to its chps) as long as it doesn't *lock* the registers (see above puke comment), I don't see why xloader couldn't override that
<DocScrutinizer05>
after all ROMBOOT isn't even supposed to be able to use SDRAM, otherwise why use xLoader and why load it to SRAM when SDRAM _really_ was available already, reliably
<DocScrutinizer05>
IF ROMBOOT does some init to SDRAM controller, that can only be a "safe config" smallest common denominator as in PC BIOS
<DocScrutinizer05>
ROMBOOT has no means to know speed of SDRAM, and to check true size it would need to do nasty tests
<DocScrutinizer05>
size, speed, and prolly organization of SDRAM is supposed to come from board config data, aka *software*
<DocScrutinizer05>
so: xLoader/U-Boot
<DocScrutinizer05>
while ROMBOOT when it's touching SDRAM at all, SHALL NOT (RFC2119) use more than first maybe 16MB of it
<DocScrutinizer05>
ROMBOOT will use a default config that's "compatible" with all possible PoP chips
<DocScrutinizer05>
I doubt it does many sophisticated tests to check for tricky stuff like real physical size and speed
<DocScrutinizer05>
and _locking_ those registers for sure is sth ROMBOOT *MUST NOT* (RFC2119) do
<DocScrutinizer05>
freemangordon: would you agree?
<freemangordon>
DocScrutinizer05: there is CHRAM section, which could be part of xloader that tells BOOTROM how to set up SDRC
<DocScrutinizer05>
ugh?! :-o
<freemangordon>
see Figure 26-31. Image Format
<DocScrutinizer05>
you say ROMBOOT is reading in a *parameter* cunk from xLoader/MLO file and doing SDRAM init on its own then, before even handing over execution to xLoader?
<freemangordon>
it *could* do
<DocScrutinizer05>
now *that* would be... screwed
<freemangordon>
no, why? sounds sane to me
<DocScrutinizer05>
sure, it may work, but complicates ROMBL
<DocScrutinizer05>
do you have a pagenumber please?
<DocScrutinizer05>
for Figure 26-31. Image Format
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<freemangordon>
3432
<DocScrutinizer05>
ta
<freemangordon>
BTW, we can simply read those values from a running N9 ;)
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<freemangordon>
sdrc is at address 6d000000
<DocScrutinizer05>
k >> The CH, which is optional, can contain several parameters set by users to speed up booting.described in the next section. It is further<< and >>26.4.8.2 CH<< :: >>The CH can contain up to four parts: • Settings: Clock settings (mandatory) • RAM: SDRAM/DDR SDRAM interface settings • FLASH: Flash interface (GPMC) settings • MMC/SD: MMC/SDIO interface settings<<
<freemangordon>
:nod:
<DocScrutinizer05>
freaky
<DocScrutinizer05>
""the CH which is optional may have mandatory clock settings"" now THAT makes 'perfect sense'
<DocScrutinizer05>
X-P
<DocScrutinizer05>
((simply read those values from a running N9)) alas I "killed" mine
<DocScrutinizer05>
ooh and btw *nothing* is that simple on this hw related level, on a N9 with Aegis
<DocScrutinizer05>
;-P
<DocScrutinizer05>
not even root may access such stuff usually
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<DocScrutinizer05>
you need the right token... from Nokia. to be allowed to do this. Or you need to "root" the device
<DocScrutinizer05>
well, open mode kernel might work
<DocScrutinizer05>
but still M-shield/whatever may have blocked it completely from userland
<DocScrutinizer05>
err form non-secure land, incl kernel
<DocScrutinizer05>
right?
<DocScrutinizer05>
I have NFC if we could run our own MLO + U-Boot + rescuesystem on a HS device like N9
<DocScrutinizer05>
most likely not, since our own MLO would lack the needed Nokia(?) signature
<DocScrutinizer05>
while readout of that register is prolly no security threat, I dunno if a) it's even possible to block write access only, and b) if Nokia MLO devels even cared to allow reading
<DocScrutinizer05>
...when completely blocking the whole addr range was so much easier anyway
<DocScrutinizer05>
anyway freemangordon, CH is a great finding which for sure should help fix the "GTA04 bootloader"
<DocScrutinizer05>
I don't know if Nik was aware
<DocScrutinizer05>
also conveniently explains why I can't find "RAMSIZE" in that sourcecode
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<freemangordon>
ok, n9 xloader sdrc code found :)
<DocScrutinizer05>
YEEHAAA!
<DocScrutinizer05>
but I guess that one doesn't have complete init incl RAMSITE either ;-) Prolly also using CH
<DocScrutinizer05>
SIZE*
<DocScrutinizer05>
prolly an analysis of N9 CH would do wonders then :-)
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<DocScrutinizer05>
Figure 26-32. CH Format p.3433
<freemangordon>
no CH, it writes to SDRC regs
<DocScrutinizer05>
hah!
<DocScrutinizer05>
RAMSIZE too?
<freemangordon>
yep, just a second
<DocScrutinizer05>
is "no CH" a cehck result, or deduced?
<freemangordon>
checked
<DocScrutinizer05>
:-D
<DocScrutinizer05>
so whatever it is in that xLoader, it SHALL do the trick :-)
<DocScrutinizer05>
(unless N9 SoC has a different "inproved" ROMBL)
<freemangordon>
write_sdrc(0x80, 0x3690019)
<DocScrutinizer05>
}o/
<DocScrutinizer05>
let's dissect this?
<freemangordon>
0x3690019 is the value we must use
<freemangordon>
ok
<DocScrutinizer05>
0b11011010010000000000011001
<freemangordon>
well, the difference is in RAS/CAS width
<freemangordon>
both are 110b
<freemangordon>
otherwise the RAM size is 0100000000 == 256 == 512MB
<DocScrutinizer05>
could you write up your findings in a mail to [internal] please? Or would you rather provide a patch already?
<freemangordon>
[internal]?
<DocScrutinizer05>
a patch would need to make sure GA04 boot isn't using a CH either
<DocScrutinizer05>
[internal] mailing list
<DocScrutinizer05>
the only one Nik reads
<freemangordon>
ok
<DocScrutinizer05>
great! :-D
<DocScrutinizer05>
many thanks!
<DocScrutinizer05>
a mail needs to elaborate about CH so whoever is doing the patch can have a look if or if not it needs tackling for GTA04 boot
<freemangordon>
DocScrutinizer05: lets first see if those vlues work
<DocScrutinizer05>
I'm still puzzled where from you got the value in your pastebin
<DocScrutinizer05>
oooooh
<DocScrutinizer05>
my C fu sucks
<DocScrutinizer05>
k
<DocScrutinizer05>
ta
<DocScrutinizer05>
yes, patch that constant and test. Is exactly what I thought we/Nik should do
<DocScrutinizer05>
nevertheless a sidenote about CH ("should not get used") is OK in the mail
<DocScrutinizer05>
right?
<DocScrutinizer05>
just in case
<DocScrutinizer05>
((<freemangordon> and the correct value is 0100000000b)) weird sh*t. So the SDRC allows one bank (with one CS) of 1GB, while redefining the other CS as an additional addr bit?
<DocScrutinizer05>
is the only thing that makes sense for 10000000000b
<DocScrutinizer05>
nd actually it *makes* sense
<DocScrutinizer05>
just there's no such PoP chip I know of, and it's 1GB max as well
<freemangordon>
DocScrutinizer05: I should do "reply all", correct?
<DocScrutinizer05>
please no
<DocScrutinizer05>
only to list
<freemangordon>
ok
<DocScrutinizer05>
:-))
<DocScrutinizer05>
thanks a ton!
<DocScrutinizer05>
hope we acconplished more in 2h than in last 8 weeks ;-)
<freemangordon>
"Your message to Neo900-devel awaits moderator approval"
<freemangordon>
:D
<freemangordon>
DocScrutinizer05: ^^^
<DocScrutinizer05>
what does it mean? - well, our IR-RX should work fine at a dynamic range between ~0.1mW/cm^2 and 20mW/cm^2, though it doesn't like ambient light at levels a multiple higher than the upper limit signal
<DocScrutinizer05>
freemangordon: he'll fix that soonish. Could you send it to me only again please?
<freemangordon>
query does the job?
<freemangordon>
oh, sure, I'll extract timings etc when it comes to it
<freemangordon>
he
<freemangordon>
DocScrutinizer05: seems like N9 xloader calculates timings, so it is not that simple to extract those
<DocScrutinizer05>
ugh
<DocScrutinizer05>
ok, so maybe document interim findings, for (even own) (later) reference
<DocScrutinizer05>
?
<freemangordon>
so I'd rather prepare a patch. when it comes to it, as the default timings should be ok. not perfect, but stable
<DocScrutinizer05>
possibly could get done in ticket too. sorry I only consider it now
<freemangordon>
I know how to send patches :)
<DocScrutinizer05>
sure, and patches are highly appreciated
* freemangordon
prepares a coffee, brb
<DocScrutinizer05>
even when they are interim, with //TODO #IF 0
<DocScrutinizer05>
wpwrak: btw is Area=0.23/100 cm^2 the physical chip area or the virtual effective area inck all lenses and stuff which could be significantly higher than chip area?
<DocScrutinizer05>
incl*
<DocScrutinizer05>
0.23mm^2 sounds a bit on the low side for the complete photodiode
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<DocScrutinizer05>
not that I'm worried about lower dynamic range limit of ~0.1mW/cm^2 we got now. Just when we get a lens boosting this piece of dust of sensitive silicon, we *might* reach 0.01mW
<DocScrutinizer05>
and same time might run into saturation with strong LEDs that blast away at 100s of mW output
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<DocScrutinizer05>
wpwrak: re f(0) of the integrator, yes, I set it high to run the simulations in a reasonable time, we may increase C2 but not too much since it has adverse effects on sensitivity as well. Anyway ambient light noise is mainly at 100/120Hz or at 10..50kHz (with LED lamps), setting the f(o) to sth next to 1Hz..5Hz should just work
<DocScrutinizer05>
NB the circuit needs some calibration time to reach a static state when IR LED starts sending
<DocScrutinizer05>
we don't want that time being in the 10s range
<DocScrutinizer05>
anyway keep in mind we consider IR transciever (whether TV remote CIR or IrDA-SIR) to sith basically in touch with th IR window in Neo900's case, so the distance between TX LED and RX photodiode is usually <15mm
<DocScrutinizer05>
s/sith/sit/
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<DocScrutinizer05>
so for a first rough estimation Ee=LED_out(max)
<DocScrutinizer05>
assuming the light dot area in 10mm distance is 1cm^2
<DocScrutinizer05>
which would be about correct for an aperture angle of >60°
<freemangordon>
will try to get all the other settings and prepare a patch
<DocScrutinizer05>
also a big THANK-YOU to Nik
<DocScrutinizer05>
freemangordon: great!
<DocScrutinizer05>
please let Nik know you're working on a patch, so we don't duplicate work
<MonkeyofDoom>
beautiful :D
<freemangordon>
DocScrutinizer05: where is the post on TMO?!? :P
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<DocScrutinizer05>
I'm usually thinking a few hours about what exactly topost to tmo
<DocScrutinizer05>
we might want to have some note about sourcing risk parts and the additional funds we need for that, already in such post
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<DocScrutinizer05>
currently I have two sources at hand for a sufficient number of chips, both in sort of standby mode
<freemangordon>
sure, it is up to you, but this is a great achievement, don't spoil it with money talks :D
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<DocScrutinizer05>
the bitter money talk will need some sugar on top. This seems perfect
<freemangordon>
yeah, sure
<DocScrutinizer05>
"hey gals and guys, we made it! 1GB! \o/ Now it's up to you if we actually can get those chips in sufficient quantities as long as they are still available"
<freemangordon>
yeah, yeah, I know it makes sense
<DocScrutinizer05>
dos1: could you review our website and maybe remove a bit of "IF"s and "MAYBE"s ? :-)
<DocScrutinizer05>
on a sidenote: 1GB cost on R&D side so far (and prolly finally) ~20EUR/device
<DocScrutinizer05>
this is for work and general R&D expense, _not_ for paying the invoice of the 1GB chips
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<DocScrutinizer05>
so we probably have to ask for ~30EUR for the 1GB chip in the end
<DocScrutinizer05>
it's quite difficult to separate hw sourcing costs for material from the "handling" expense it causes
<DocScrutinizer05>
anyway none of this was in initial price estimation, so the 1GB made device ~30EUR more expensive than originally expected
<DocScrutinizer05>
hope you consider this worthwhile
<DocScrutinizer05>
(a honest merchant would ask for 100EUR for same feature btw, to secure the company also earns some income from it)
<DocScrutinizer05>
(then a honest merchant never would do a project like Neo900 anyway ;-) )
<ddark>
i dont think that any merchant will go for such gamble with project like this
<DocScrutinizer05>
exactly
<MonkeyofDoom>
sometimes it's hard to believe that the N900 itself happened
<DocScrutinizer05>
that's why it needed an "idiot" like me doing it ;-)
<MonkeyofDoom>
I have to wonder if things would have been different had Nokia tried to focus less on bringing maemo to parity with the big smartphone OSes and more on a "sustainable" product line for a niche market
<DocScrutinizer05>
I guess it would have been the WAY smarter marketing strategy
<DocScrutinizer05>
spilled milk
<MonkeyofDoom>
yeah
<MonkeyofDoom>
I'm just glad Neo900 is picking up the torch ;)
<DocScrutinizer05>
heh :-)
<DocScrutinizer05>
afk, RL calling
<kerio>
DocScrutinizer05: are you saying that you're not honest? :>
<DocScrutinizer05>
I'm saying I'm no merchant
<kerio>
DocMerchantizer
<kerio>
DocMerchantizer04.99
<DocScrutinizer05>
in any company I would get fired for running a project like Neo900
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<kerio>
in any company you'd have a budget
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<DocScrutinizer05>
rihjz
<DocScrutinizer05>
ugh
<DocScrutinizer05>
right
<kerio>
stuff gets pretty fucking easy when you actually have money
<DocScrutinizer05>
we had, a few. We're running short of that now
<DocScrutinizer05>
I'm about to source the N900 parts for you, need money to actually secure them
<DocScrutinizer05>
I managed to get 1GB as a product feature, need money to actually secure it now
<kerio>
i hope you don't mean "you" as in me
<kerio>
but more as in "the community in general"
<ddark>
BTW, have you considered option for direct PayPal payment in the webshop for those who ordered via pichlo ? (Dont want to lose money on bank fees)
<DocScrutinizer05>
you, the Neo900 community
<DocScrutinizer05>
ddark: I lostz track of what's going on with pichlo and the customers using his forwarding service
<DocScrutinizer05>
we only have payments with a mail addr in subject here
<DocScrutinizer05>
paypal is available since err 9 months somesuch
<DocScrutinizer05>
I'm looking forward to finally creating a personal webshop webpage with login for each customer of Neo900
<DocScrutinizer05>
alas it seems this particular task is somewhat cursed, everybody I hire to do it falls sick or whatever
<DocScrutinizer05>
prolly in the end I'll create 430 unix accounts on shell ;-)
<DocScrutinizer05>
great tool, though docs suck as usual
<DocScrutinizer05>
or I didn't find the ones who don't suck, yet
<DocScrutinizer05>
well, it has "Frist steps..." in "Help" menu. But it's pretty hard to find out details like e.g. the format for a input file for a "file based voltage spource"