<wpwrak>
DocScrutinizer05: we have the battery net as "BATT". however, documentation often refers to it as "VBAT" or even "VBAT-RAW". ("raw" as upposed to "not switched", however still measured (fuel gauge)). would be good to unify the naming. any preference ?
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<DocScrutinizer05>
I offered discussing this, you rejected that
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<wpwrak>
huh ?
<wpwrak>
well, whatever. just tell me what you want. in either case, some things need updating.
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<wpwrak>
DocScrutinizer05: regarding the silegos, do you think we should see if openfpga is far enough to use for programming them, or rather stick with silego's closed tools ?
<DocScrutinizer05>
for now we'll stick with the latter
<enyc>
ooooh silegos glue logic of some form?
<wpwrak>
ok, any plans for the one that goes into the IR subsystem ? i'd like to have some reasonable pin assignment for the schematics. doesn't have to be perfect, just not obviously wrong. shall i make a draft, or would you rather do it ?
<wpwrak>
enyc: meh, for ages. does nobody ready our white papers ? :(
<wpwrak>
enyc: we have one for the (pretty complex) power selection logic of the SIM switch, and added a while ago also one for IR, which also needs a fair amount of glue logic. not nearly as much as the SIM switch, but still enough to make a solution with discrete components rather unappealing.
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<wpwrak>
DocScrutinizer05: well, i'll just use ACMP0. then it's easy enough to guess the rest, without even needing a draft config for the slg
<DocScrutinizer05>
:nod:
<wpwrak>
hmm, in the IR WP, we have a bunch of GPIOs to configure the logic. but given that we silego has i2c-settable bits, i guess we can just use these.