00:11 <mkk_> [Mehdi Saligane, skywater-pdk] If anyone is interested. This was done to improve timing of an (Core + SRAM) using 2 main techniques:

00:11 <mkk_> *Let fail and correct approach to hardware (RAZOR / EDAC):*

00:11 <mkk_> https://npfet.com/publication/zhang_irazor_2018/zhang_irazor_2018.pdf

00:11 <mkk_> https://ieeexplore.ieee.org/abstract/document/7418031 (memory)

00:11 <mkk_> *Canary approach done with RADHARD team @ STMicro:*

00:11 <mkk_> These techniques are used for PVTA (Process, Voltage, Temperature, Ageing) variations and reliability. Eventually, we could use such circuits in skywater and other open sourced nodes :)

00:11 <mkk_> https://ieeexplore.ieee.org/abstract/document/7062970