<tpb>
Title: Move settings out of database directory into new settings directory. by mithro · Pull Request #427 · SymbiFlow/prjxray · GitHub (at github.com)
<digshadow>
mithro: fwiw your readme changes will conflict with GuzTech outstanding stuff
<digshadow>
his PR was close. Maybe we should merge that and you rebase on that?
<digshadow>
will => might
<mithro>
Yeah, I can rebase pretty easily
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<mithro>
digshadow: Did an initial rebase ontop of GuzTech's pull request, so make sure to merge his first
<digshadow>
mithro: the issue is that I was proposing some tweaks to his
<digshadow>
if you make the proposed tweaks in yours though
<mithro>
digshadow: Yeah, I can rebase after he fixes that
<digshadow>
I can merge your PR with his rebase?
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<GuzTech>
digshadow: No worries! I removed the warning and added "recommended" to the first option.
<digshadow>
checking
<digshadow>
GuzTech: LGTM!
<digshadow>
Going to merge it
<digshadow>
thanks for sticking with me to sort that stuff out
<GuzTech>
Hey no problem. It's the least I can do :)
<digshadow>
just waiting for travis now
<digshadow>
mithro: I'm going to look for breakfast. Feel free to merge it
<GuzTech>
I want to help with other stuff as well (just like sorear apparently :) ).
<GuzTech>
Let's see what we can unravel about the 7-series.
<digshadow>
GuzTech: is there anything in particular you are intested in
<digshadow>
interested
<GuzTech>
I'd like to start simple to better understand the process, but otherwise I don't know.
<digshadow>
GuzTech: right, but if you for example are interested in a specific part of the fpga, I can guide you through the process
<GuzTech>
mithro mentioned IOBs for example. Pretty important to get that working me thinks.
<digshadow>
GuzTech: sure, if you want to work on it its setup decently right now. But please coordinate with me as I might work on it in the next few weeks
<digshadow>
merged!
<digshadow>
mithro: you can rebase now if you want
<mithro>
GuzTech: Were you at 35c3?
<mithro>
digshadow: Done!
<sorear>
i'm mostly an algorithms person, I'd be jumping on analytic placement if someone else wasn't
<mithro>
sorear: We could use help with things like the routing graph deduping and stuff
<sorear>
yes. i am very interested in that specifically
<GuzTech>
mithro: unfortunately not
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<GuzTech>
digshadow: anything simple you can recommend then?
<tpb>
Title: Proposal for alternative fabric and switch specification format · Issue #286 · verilog-to-routing/vtr-verilog-to-routing · GitHub (at github.com)
<mithro>
On my way to Poznan now. Will be in and out as change trains and such...
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<torgax>
hi, I'm new to FPGA's (I got one one a LAN-party as a price, an icestick) and would like to write a really basic CPU using only opensource software. A long time ago, I used yosys, arachne-pnr and another tool to compile for FPGA's, but never got anywhere. What tools would you recommend? I'd like to have some kind of test bench, so I don't have to physically test it everyime. Sorry if this is offtopic
<sorear>
yosys and icestorm is still good, there are a few new options but we don't want everyone to switch immediately
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<digshadow>
GuzTech, mithro : FWIW that is the longest running fuzzer, although definitely could use some help improving performance (such as paralleizing it)
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<digshadow>
hi nono2357
<nono2357>
hi
<nono2357>
I would like to help with the Xilinx series 7 toolchain
<nono2357>
I'm familiar with Python, Verilog, apio and Vivado, how can I help?
<mithro>
Hi nono2357, I'm currently on a train, so will be in and out
<mithro>
nono2357: How much free time do you have?
<nono2357>
about 3-4 hours a week
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<mithro>
nono2357: We need a lot of help cleaning up and optimizing the Python stuff in prjxray and in symbiflow-arch-defs
<nono2357>
any beta test/bug report in the toolchain?
<nono2357>
would be easier than to understand the whole thing