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<itoral>
apinheiro: about the register allocation weirdness I told you about yesterday... it turns out the VIR in one version of the shader is indeed different, but very slightly so, however, that had a significant impact in the generated code because it affected register allocation in a way that limited QPU instruction merging
<itoral>
so I traced back the source of the issue in the register allocator, and ran that through the UE4 shaders in shader-db
<itoral>
and I got a -2% in instruction counts
<itoral>
I still have to do a full run and see if the benefit stays there, but that is promising