<nrdmn>
Is it possible to have enum or union members with names that entirely consist out of digits?
<alexnask>
@"1234" is a valid identifier :)
<alexnask>
Ασ ςελλ ασ @"😂"
<alexnask>
Woops.. As well as @"😂" *
<nrdmn>
huh.. a minute ago zig didn't like that, now it does
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<andrewrk>
alexnask, we can probably get away with all vtable functions required to be comptime-known, right?
<andrewrk>
if someone needed to call a runtime-known fn pointer in an interface implementation function, they could do it in their implementation rather than with the vtable pointer itself being runtime known
<alexnask>
I think so. My current implementation also makes that assumption atm (it generates a type erased function that casts to the correct type and calls implementation function with always_inline)
<alexnask>
Although the requirement for comptime-known functions could also be relaxed for generic functions only
<andrewrk>
hmm interesting
<LakeByTheWoods>
test-stage2 is failing for me complaining "zig/zig_cpp/libzig_cpp.a: file not found", is anyone else having this issue/should I open one?
<LakeByTheWoods>
(or is there something that I goofed up?)
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<andrewrk>
LakeByTheWoods, that file is produced by `make`
<LakeByTheWoods>
Hmm, looks like it's in zig/build/zig_cpp but it's looking for it in zig/zig_cpp
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<adamkowalski>
do we have something akin to numeric limits?
<adamkowalski>
I want to find the maximum value for a particular type such as f64
<adamkowalski>
and the smallest possible value for f64
<adamkowalski>
nevermind, we have std.math.maxint and then std.math.f16max, std.math.f32max, etc
<fengb>
Smallest float would be negative infinity right? 🙃
<adamkowalski>
you laught, but I actually need that as well
<adamkowalski>
it doesnt' seem like have std.math.f16_Min
<adamkowalski>
fengb: I could also use your help with this: git push --set-upstream origin reduce
<adamkowalski>
for that forward function I have a very clear pattern, what tools does zig give me to remove that repetition?
<adamkowalski>
the only thing changing from line to line is the type
<fengb>
I’ve mostly manually done it the way you did
<fengb>
You could try using inline for / if chain but that might be harder to get right
<adamkowalski>
dang, yeah I might have to try with inline for, because I have that pattern all over the place
<adamkowalski>
I normally would have used macros in something like lisp, but I feel like we have a strong enough meta programming system in Zig it should be possible
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<daurnimator>
adamkowalski: grab the tag out of `x` and use that
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<mq32>
alexnask, i feel surveilled!
<alexnask>
:P
<alexnask>
Just checking my github notifications ;)
<mq32>
hehe ^^
<mq32>
but yeah i think "error{}!noreturn" is pretty expressive and the logic straightforward (imho)
<alexnask>
Yes I agree, the intent seems clear to me as well
<fengb>
I read that as “error not noreturn”
<mq32>
fengb, how do you read "error{}!void" then? ;)
<alexnask>
hah was gonna ask this
<alexnask>
This should just generate a llvm function that returns the error set and add an unreachable at the bottom of the function imo
<andrewrk>
^ correct
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<discip>
If one wanted to create a linter for Zig, would the std/zig files (ast.zig, parse.zig, etc.) be a good starting point?
<mq32>
yeah, i think so. these are used with stage1 as well (if i'm right)
<alexnask>
yes zig fmt uses those
<fengb>
Pedantic: You mean stage 2. Stage 1 is in C++
<alexnask>
Pedantic: stage 0 is in C++, stage 1 is a mix of C++ and zig
<mq32>
alexnask: i thought so
<alexnask>
zig fmt is implemented in zig as well as stage 1 stacktraces
<mq32>
stage0 is full c++, but afaik we compile stuff with stage1
<alexnask>
(I think those are the two uses, could be wrong)
<mq32>
stage2 would be 100% zig
<discip>
Zig fmt is a pretty similiar use-case to a linter so that's promising. Thanks everyone
<alexnask>
cheers
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<mq32>
oh neat
<mq32>
i'm reading stuff about the ARM calling convention
<mq32>
> If the type of value returned is too large to fit in r0 to r3, or whose size cannot be determined statically at compile time, then the caller must allocate space for that value at run time, and pass a pointer to that space in r0.
<mq32>
this means that Zigs default behaviour is quite suited for arm with result location and similar
<TheLemonMan>
what are you doing that needs you to switch the stack?
<mq32>
huh
<mq32>
TheLemonMan: I want to implement a two-task system on a cortex-m3
<mq32>
(in C/C++)
<mq32>
but i want to see how stack switching works in thumb
<TheLemonMan>
write the task switching code using a piece of asm
<mq32>
that's the plan
<mq32>
first draw is cooperative, so "save all registers, change sp, return" should be sufficient
<TheLemonMan>
using @call will absolutely bite you
<mq32>
i just want to see how to change SP :D
<fengb>
What's wrong with @call?
<TheLemonMan>
`mov sp, rX` ?
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<TheLemonMan>
fengb, #3268
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<fengb>
Does this affect async functions too?
<TheLemonMan>
hmm, the "new" async function implementations should just box all the locals in a context structure that's passed around
<fengb>
I think andrewrk mentioned using async as a workaround for manually switching the stack
<mq32>
TheLemonMan: do you know how to reference another element from inline assembler? looks like symbol names in GCC aren't shared between ASM and compiler?
<TheLemonMan>
hm? the inline asm is in the same compilation unit as the other Zig code
<TheLemonMan>
where are the other symbols defined?
<mq32>
i'm in GCC/C++ right now, not zig (sadly)
<TheLemonMan>
you should be able to reference the symbols in the C code and the linker will resolve them
<mq32>
put the assembler stuff into its own file, now it works
<mq32>
TheLemonMan: if i'm reading the docs right, "push {r0-r7,lr}" means that lr is not at the "top" of the stack, but at the position at the start of the pushing?
<TheLemonMan>
yeah if I enable the LTO I cannot get it to compile too, for some weird reason it's also spitting a slew of unrelated errors if I do so :\
<mq32>
crazy
<mq32>
i should file a bug tomorrow
<TheLemonMan>
the lr goes last
<TheLemonMan>
so at SP-8*4
<mq32>
oh wait
<mq32>
> Registers are stored on the stack in numerical order, with the lowest numbered register at the lowest address.
<mq32>
lr is r14, so it would have the highest address?
<TheLemonMan>
oh yeah, it goes "backwards"
* mq32
is feeling professional for actually consulting the CPU docs instead of just asking random dudes in IRC *grin*
<TheLemonMan>
I've spent too much time working on non-ARM CPUs, some details are blurry :(
<mq32>
yeah, i can imagine
<mq32>
and yeah, i'm actually reading the docs! :D
<TheLemonMan>
at some point in time I could really tell you every 6502 opcode from its hex value heh
<mq32>
heh, neat!
<mq32>
i'm not the dude for 6502, and i wasn't alive back then :D
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<mikdusan>
hmm do we have anything like an `@asMaybe(T, expr) ?T`
<shakesoda>
mikdusan: don't things coerce into optionals anyway?
<shakesoda>
I can certainly assign normal things to them
<mikdusan>
I want to check if a coerce can happen
<andrewrk>
mikdusan, I think that would be a code smell
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<mikdusan>
we need a unicode for that
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<fengb>
💩
<mikdusan>
well ok. I was thinking like a pinched nose
<fengb>
🤏👃
<fengb>
Looks like I'm making fun of the size of the nose
<jaredmm>
Oh, that's a nose.
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<pixelherodev>
Hmm, how would one do optional arguments via a tuple arg?
<pixelherodev>
@hasDecl(@TypeOf(args), "title") is giving false even when called with `(.{.title = ""})`
<mikdusan>
bug?
<mikdusan>
`@compileLog(.{ .num = 1 })` output is `| undefined`
<fengb>
That's a field, not a decl
<mikdusan>
fengb: with the goal :)
<pixelherodev>
Oh right!
<pixelherodev>
fengb, thanks!
<marijnfs>
I solved the serializer issue I was having like this: https://godbolt.org/z/J6RrHg Is that the way to do it?
<mq32>
marijnfs, why are you using a slice of streams?
<andrewrk>
undefined values cause undefined behavior under well-defined cincumstances
<andrewrk>
*circumstances
<nrdmn>
andrewrk: is this necessary for extern enums?
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<andrewrk>
all enums including extern enums are exhaustive by default
<pixelherodev>
mq32, I know, that's why I'm doing this :)
<pixelherodev>
If I have a few projects and I swap between them, *and they have real purposes*, I can get work done
<pixelherodev>
If I focus on too many projects or too few, I burn out on all of them
<pixelherodev>
ZigIRRat is meant to (hopefully) become a part of stage2 eventually (or at least, part of *a* Zig compiler, even if not upstream)
<pixelherodev>
The GUI library is for a game I'm making
<pixelherodev>
I was going to just use Sokol directly but I hate *hate* low-level graphics
<pixelherodev>
I can *do* it, but not *well*
<pixelherodev>
So if I make a simplistic high-level wrapper and avoid touching it, and that wrapper happens to be useful, might as well publish it
<pixelherodev>
Also planning on finally following up on the Zig post I wrote months back
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<marijnfs>
Hmm Why am i getting: Code Generation [925/1600] std.array_list.AlignedArrayList(std.build.LinkObject,Build Dependencies...Unrecognized glibc version: 2.31.0 unrecognized C ABI
<andrewrk>
glibc 2.31 support was added in 3ff2381042104d0626545fbc655cb6d8a04ccd0b (march 4th)
<marijnfs>
andrewrk: ah thanks, can I somehow change the target or something? Or just wait for a fix
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<andrewrk>
the fix has been in master branch for 5 days - you should be able to git pull or download a master build
<TheLemonMan>
andrewrk, I think I'm hitting bug in the caching mechanism
<andrewrk>
you have piqued my interest
<marijnfs>
andrewrk: ah your right, my cmake-prefix was screwed up
<TheLemonMan>
if you compile the same file twice, the first time with `zig build-exe -mcpu cortex_a8+thumb_mode -target thumb-freestanding --cache off file.zig` and after that as `zig build-exe -mcpu cortex_a8 -target thumb-freestanding --cache off file.zig` you can see that compiler_rt and c are not recompiled due to the different flags
<TheLemonMan>
this way you end up with a mix of arm and thumb code in the second binary
<andrewrk>
yikes
<TheLemonMan>
I don't really know why thumb-freestanding keeps producing ARM code :\
<TheLemonMan>
if I force the thumb code generation with +thumb_mode it works correctly
<andrewrk>
TheLemonMan, do we need to enable +thumb_mode by default for the thumb architecture?
<andrewrk>
in this case, why do we even have a thumb architecture, seems like it should just be a cpu feature
<TheLemonMan>
no idea, I remember that specifiying thumb-freestanding was enough to get thumb code
<mikdusan>
don't know if related... seem to recall way back someone mentioning that compiler_rt args when passing mcpu stuff not consistent but never tracked it
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<marijnfs>
Where does @import search, can I add zig 'include' directories to the zig builder?
<andrewrk>
marijnfs, you want addPackagePath
<marijnfs>
andrewrk: I indeed want that
<andrewrk>
whatever name you choose will be available with @import("name")
<TheLemonMan>
andrewrk, this LLVM PR https://reviews.llvm.org/D33448?id=100371 seems to suggest that +thumb_mode should be added by default if the target triple says so
<marijnfs>
andrewrk: that's pretty sweet
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<andrewrk>
TheLemonMan, per-function basis! it looks like cpu features / architecture might be something we need to support overriding at a per-scope level
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<mikdusan>
andrewrk: if I enable --verbose-llvm-cpu-features, build an exe with `-mcpu native` .... then build again with `-mcpu native-avx` should I expect to see the "+avx" change to "-avx" ?