##openfpga on 2021-05-10 — irc logs at freenode.irclog.whitequark.org

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16:24 <kc8apf> mithro: you have a hand in https://openpowerfoundation.org/openpower-foundation-announces-librebmc-a-power-based-fully-open-source-bmc/?

16:25 <mithro> kc8apf: Yes

16:25 <kc8apf> thought you might

16:25 <kc8apf> targeting SkyWater?

16:25 <mithro> That announcement is slightly wrong....

16:25 <mithro> kc8apf: Nope, FPGA based!

16:27 <kc8apf> No plan to take it to ASIC?

16:33 <mithro> kc8apf: Maybe in a distant future, but we want the flexibility to evolve the SoC after deployment

16:34 <kc8apf> ah

16:35 <mithro> kc8apf: You are at Oxide these days, right?

16:35 <kc8apf> yup

16:36 <mithro> kc8apf: I would love to have Oxide involved in some way

16:37 <mithro> I was talking to Arjen Roodselaar who I think it also at Oxide about KiCAD / IBIS / Spice / emag simulation recently

16:37 <kc8apf> well, LibreBMC is definitely a topic of discussion this morning

16:38 <mithro> kc8apf: The idea is that it should just be https://github.com/litex-hub/linux-on-litex-vexriscv with a power core switched in

16:38 <mithro> kc8apf: https://antmicro.com/blog/2020/05/multicore-vex-in-litex/

16:38 <kc8apf> I forsee some challenges for our use case mostly around secure boot

16:39 <mithro> Might also be related to https://antmicro.com/blog/2021/04/lpddr4-test-platform/

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17:02 <mithro> kc8apf: In most cases we have an EC / RoT whose job it is to boot the BMC FPGA

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