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<wens>
icenowy[m]: dropping the opi pc patch and putting the rest in -next
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<Pe3ucTop>
focus_: What do you think about putting DDR3 SODIM module (connector) instead of DDR3 chips in that R40 open design ??
<buZz>
pleaaaaaaaaaaaase do
<JohnDoe_71Rus>
and put in so-dimm raspberry module :)
<buZz>
noooo
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<Pe3ucTop>
no, kill raspberry with fire :D
<beeble>
for starters. so-dimm has a 64bit bus, r40 has a 32bit bus. so half the memory would be wasted from the get go
<f11f12>
focus: btw DDR3, do you have any documentation for the DDR3 timing settings? Do you route as balanced-T? Would fly-by be supported?
<Pe3ucTop>
beeble: Noup, we can see 64bit SoDim as 2x 32bit..
<beeble>
and then someone has to add all the spd stuff to the sunxi spl
<f11f12>
Is there any documentation on the DRAM controller to adjust any seetings?
<buZz>
we dont need spd stuff, just run at lowest common denominator ;)
<Pe3ucTop>
beeble: is setting adjustment to each DDR3 chip better than spd, i think oposit.
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<beeble>
Pe3ucTop: of course it's better, but it's not implemented yet
<beeble>
Pe3ucTop: and how would you mask the upper/lower 32bit when reading data?
<Pe3ucTop>
beeble: yes, agree, it's not easy from electronics and software side, it's just idea.
<f11f12>
beeble: is the DRAM controller in the R40 (or any allwinner soc) a known IP block?
<Pe3ucTop>
beeble: thinking about it right now, possibly by muxing DM signals, could be it is not possible..
<f11f12>
Pe3ucTop you'll need very fast, ddr-capable 74373s :-)
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<Pe3ucTop>
but, anyway there is 32bit DDR3 sodim modules on the market...
<Pe3ucTop>
but, yes, price could be higher than expected.
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<hitech95>
I'm designing a A33 board but i would know how the digital interface is multiplexed with the analog codec. I have read the datasheeet and also some drivers but is not clear. Is the digital interface indipendert from the analog codec? IS the analog codec connected to the same i2s lines of the digital interface? The a33 have AIF1/2/3 but on analog codec driver i have found only ref to aif1 and aif2 and no aif3. What i'm interested in: ANALOG
<hitech95>
playback via the inner codec or via an external codec. Recording via internal codec. I also have a bluetooth module hooked on aif3 for bluetooth audio stuff and FM radio.
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<beeble>
f11f12: most current one have a designware variant. no idea about sun8i, but i would guess so
<paulliu>
wens: sorry for bothering. In sun8i kernel, for allwinner h2+, inside the device tree I didn't see any memory {} node. How does the kernel get the memory size then?
<f11f12>
beeble: routing guidelines would be nice, a fly by topology would simplify the layout (but now it's done...)
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<smaeul>
paulliu: u-boot patches it in
<beeble>
f11f12: you are on your own with that. don't expect any documentation. all the information about the dram controller is by matching registers to the synopsis documents and libdram disassembly. i wouldn't risk a flyby topology due the lack of info as it isn't even clear what features the controller has synthesised
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<f11f12>
beeble: documentation is an issue with those allwinner socs. Is rockchip better?
<beeble>
in my opinion yes
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<paulliu>
smaeul: ok. Does that mean we need to configure memory mappings in u-boot?
<paulliu>
smaeul: How u-boot get the memory size then? I also didn't see memory node in u-boot's dts
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<KotCzarny>
there is a lot of cheap ddr3 laptop modules available second hand
<KotCzarny>
when people moved from 1-4 to 8-32gb
<KotCzarny>
even using half of it is a free ram
<KotCzarny>
assuming it would work
<wens>
paulliu: u-boot puts it in
<paulliu>
wens: ok. where is it? I mean if I'd like to reserve a memory block for OPTEE secure world, I need to do some modification there, right?
<wens>
u-boot has some function to add reserved memory regions
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<wens>
and also simplefb carves out some space at the end of dram
<wens>
both are worth looking into
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<focus>
f11f12: I would plan routing the DD3 with KiCAD's length tuning tools. At GHz speeds, the tolerance for error I believe is around 0.3mm. I believe some of this error is tuned out by DDR tuning software in livesuit. These are only just beliefs.
<focus>
(I'm resigned to 2 versions of board build failure and documenting all experiences heavily so no one else has to follow the same path to failure.)
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<focus>
Just learned of this - make your own chips for a few thousand dollars https://www.mosis.com/
<focus>
They already make 60,000 designs!!! - 5 different designs per day
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<focus>
I might be able to make my Digital Quantum chuper cumputer after all!! :)
<focus>
Pe3ucTop: eminently doable but here are the pitfalls - the DDR length tuning needs to be 0.3mm accurate including connector lengths to DDR chip, second you may need to run livesuit with every change of DRAM module
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<focus>
and create/change those fel boot file DRAM parameters for every DRAM module - this is just a belief - someone can correct me
<focus>
alternatively run it at lower clock speeds - again this just a system of my personal beliefs
<beeble>
focus: why not using mainline uboot that has a sane memory init?
<focus>
beeble: fire away suggestions - i got to get back into all that - right now in the middle of hardware, then get board, then uboot, generate Linux kernel etc
<focus>
if uboot has sane memory init, yeah - lets use it :)
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<focus>
(my belief was that only livesuit could generate the DRAM init parameters
<focus>
but that was 2 years back - everything changed now?)
<focus>
we were trying to do same thing with A10/A20 helping lckl, then I had funds, but ran out of time - now doing same with R40, but have funds and time :)
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<beeble>
focus: sorry, you are doing r40 stuff not a33, mixed things up
<focus>
(For PCs, the DRAM init parameters are on the bios set up page, may be having a similar set up option for allwinner SoC somehow into uboot can help things out?)
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<f11f12>
beeble: I use mainline uboot on V40, it works.
<f11f12>
jernej: I can;t seem to find the HDMI phy when doing it properly. I try to understand the detection mechanism used. Is it top->down only?
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<hitech95>
no one knows the audo layer?
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<focus>
f11f12: V40 same or similar as R40 - must try mainline uboot :)
<megi>
t4h4: I'm not sure why it's not in the usual listings
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<HuskyGD>
Hello, I'm trying to compile android 6 with sunxi 3.10, my device will be connected via HDMI to 2k display. I'm only able to set 1080p over HDMI, and I'm trying to find place where I can add support to video driver for 2560x1440 resolution
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<t4h4>
megi: huh thanks
<KotCzarny>
under-the-counter stuff
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<KotCzarny>
awesome
<megi>
:D
<KotCzarny>
shh, hey kid, want some oranges?
<megi>
I keep things in the cart, they can't take that away from me
<t4h4>
well anyone tried replacing the emmc on their 2E then?
<megi>
I could probably pull the chip off, but that's it
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<t4h4>
there are some sweet cheap Pro Class2000 emmc's
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<t4h4>
2k/5k io
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<hlauer>
hitech95: use i2s on the a20, but need an old PLL2 setup from <=4.9.21. wens said, analog codec needs current kernel stuff.
<KotCzarny>
um, what a20 board has i2s routed?
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<hlauer>
BananaPro
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<KotCzarny>
interesting
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<hlauer>
And interesting enough, in PLL2 is a status bit which is described in r40 docu, but not a20
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<wens>
hlauer: the lock bit was introduced with the a31, or sun6i style clocks
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<hlauer>
0x90105e19 and 0x90102b15 are the values for 44.1kHz and 48kHz (maybe wrong order), will try what happens with b28 cleared.
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<wens>
b28 is read only, you can't clear it
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<hlauer>
yes, but not described in a20 v1.4 docu - there it's rw and part of PLL2_POST_DIV
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<wens>
oh right
<wens>
forgot about the post div
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<fredl-pc>
my goodness, buildroot is a big monster, LOL
<fredl-pc>
I'm trying to remember who was the person here that recommended it to me :P
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<fredl-pc>
hey guys just out of curiosity, what would you recommend as a terminal to talk to the UART on most embedded devices?
<fredl-pc>
I've been using minicom so far but curious if there's anything that's more tailored for this kind of work.
<beeble>
take whatever you feel comfortable with. cu, picocom, minicom, screen
<DonkeyHotei>
tailored how?
<KotCzarny>
for windoze putty is nice
<beeble>
what features do you expect from a serial terminal? :)
<pmpp>
fredl-pc: femtocom.sh
<fredl-pc>
Well for example... I have never been able to see BROM output from the A20 and I'm not sure if it's minicom or the USB chip in between that's causing troubles
<DonkeyHotei>
which chip?
<fredl-pc>
It's frequently turned on/off, that confuses sometimes baudrates, not fully sure why though
<KotCzarny>
line noise?
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<fredl-pc>
And minicom IS written for serial ports, arguably a USB port IS a serial port but not quite
<DonkeyHotei>
pl2303?
<fredl-pc>
Don't think it's linenouse KotCzarny but may be
<fredl-pc>
Not sure DonkeyHotei
<fredl-pc>
Oh actually I do...
<fredl-pc>
hang on
<fredl-pc>
[169227.996338] usb 4-1.2.3: Product: MCP2200 USB Serial Port Emulator
<fredl-pc>
that's the chip our hardware folks used in the debug board they made
<fredl-pc>
I mean, isn't the BROM *supposed* to give output on UART on booting?
<fredl-pc>
I think I read that somewhere, we even had a scope on it but didn't seen any signal on it before loading u-boot into it
<KotCzarny>
is debug uart exposed somewhere?
<KotCzarny>
(on your board)
<fredl-pc>
what do you mean exactly with 'exposed' ?
<fredl-pc>
You mean for linenoise?
<KotCzarny>
raw pins to soc
<KotCzarny>
so you can connect different usb2uart dongle
<beeble>
iirc BROM has no uart output
<fredl-pc>
Nope. In fact we've even had an usb2uart cable connected to GPIO pins of a bananapi and there also didn't see BROM signalling
<fredl-pc>
It doesn't beeble?? Well damn, that explain a lot then :P
<KotCzarny>
then problem solved
<KotCzarny>
:)
<fredl-pc>
yeah indeed, LOL
<fredl-pc>
I could sweat I read that somewhere though, I mean ffs.
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<fredl-pc>
Personally I'd hope to see things like 'checking eMMC, checking NAND, no bootsig found, going to FEL'
<fredl-pc>
or stuff like that
<beeble>
nope
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<KotCzarny>
no, npi k1+
<KotCzarny>
erm, wrong chan
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<fredl-pc>
Hmm I'm a little bit confused here...
<fredl-pc>
sunxi-fel retrieves the SID over USB0 doesn't it?
<fredl-pc>
or over UART?
<KotCzarny>
usb0
<fredl-pc>
bizarre, I see it with just UART connected
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<KotCzarny>
how do you power it?
<KotCzarny>
also, last time i checked sunxi-fel used libusb
<fredl-pc>
oh but there's a UART 2 USB chip in between
<fredl-pc>
and it's powered only through that port
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<fredl-pc>
wow, just tried something... and turns out I can even push u-boot to it through the UART port, something gotta be wrong here
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<fredl-pc>
I really hate my life sometimes
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<willmore>
focus_, mosis was what the kids used to fab their chips back when I was in college in the early 90's. The price hasn't changed, but they got around 2K gates in a 40 pin DIP. I imagine $1K gets you more these days.
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