ChanServ changed the topic of #nmigen to: nMigen hardware description language · code at https://github.com/nmigen · logs at https://freenode.irclog.whitequark.org/nmigen · IRC meetings each Monday at 1800 UTC · next meeting TBD
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<_whitenotifier> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/JtaWW
<_whitenotifier> [YoWASP/yosys] whitequark 029a57e - Update dependencies.
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<_whitenotifier> [YoWASP/yosys] whitequark pushed 7 commits to release [+0/-0/±7] https://git.io/Jtarr
<_whitenotifier> [YoWASP/yosys] whitequark fab1c12 - Update dependencies.
<_whitenotifier> [YoWASP/yosys] whitequark 4b0c34c - Update dependencies.
<_whitenotifier> [YoWASP/yosys] whitequark 2d10832 - Update dependencies.
<_whitenotifier> [YoWASP/yosys] ... and 4 more commits.
<_whitenotifier> [YoWASP/nextpnr] whitequark pushed 5 commits to release [+0/-0/±6] https://git.io/JtarK
<_whitenotifier> [YoWASP/nextpnr] whitequark 40f39a5 - Update wasi-sdk.
<_whitenotifier> [YoWASP/nextpnr] whitequark cf366f7 - Update dependencies.
<_whitenotifier> [YoWASP/nextpnr] whitequark f719e95 - Update dependencies.
<_whitenotifier> [YoWASP/nextpnr] ... and 2 more commits.
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<d1b2> <dub_dub_11> would there be a benefit to having a PCIeResource in nmigen-boards?
<Sarayan> isn't HIP varying vidly from one fpga to the other?
<whitequark> possibly
<Sarayan> widly
<Sarayan> wildly damnit
<whitequark> on ECP5 you would use location constraints for transceivers anwyay
<whitequark> so pin constraints are of no good use
<Sarayan> (I love that Intel/Altera calls the PCIe Hard-IP block "HIP")
<modwizcode> that's... unclear lol
<modwizcode> I was like what are you talking about
<d1b2> <dub_dub_11> ah I see
<d1b2> <dub_dub_11> cause the transcievers are hard-wired to specific pins
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<whitequark> dub_dub_11: no, it could in principle use pins
<whitequark> it just doesn't in practice
<whitequark> arguably an omission in the toolchain
<d1b2> <dub_dub_11> oh huh
<DX-MON> not sure if you saw me post it before, whitequark.. however, what's your take on:
<DX-MON> I've been having to write a fair few extensions to nMigen-soc to port the CSRs from OV and misoc over.. would it be of interest for some of those changes to be aimed upstream to the repo?
<DX-MON> I'm not sure what the intended direction is with nMigen-soc so before I go ham, I wanted to check in
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<modwizcode> What is the intended usecase of the nMigen-soc CSR code anyway? It's not really clear to me, there's some wishbone code in there too but it doesn't really do much more than declare pins from what I could tell
<DX-MON> from how it works.. it's generic "this is a CSR" description code for peripherals to use so they can be glued to any bus based on that
<DX-MON> and then "here's the generic how to access a CSR from a bus" for a CPU to use
<whitequark> DX-MON: we need to finish streams/interfaces before any major work on nmigen-soc
<DX-MON> ahhh, okieday
<DX-MON> and I can imagine with everything else *gestures* that's been really at the bottom of the TODO list
<modwizcode> I'm hoping to understand the streams stuff in more detail at some point :p
<_whitenotifier> [nmigen] hellow554 closed issue #590: How to derive the negative edge from a clock - https://git.io/Jt2kI
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<whitequark> streams are actually very high priority
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<modwizcode> I've been following the thread
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<d1b2> <edbordin> apologies if this has already been discussed at length... I saw on twitter m-labs is trying to trademark nmigen. Is that likely to cause any issues?
<Lofty> They're doing *what?*
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