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[starshipraider] azonenberg pushed 3 commits to master [+0/-0/±22] https://git.io/JJthc
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[starshipraider] azonenberg dede4c6 - Continued MCU fanout
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[starshipraider] azonenberg 418a4cd - Continued MCU layout
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[starshipraider] azonenberg 0693601 - Continued MCU routing
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<azonenberg>
Lol so i got the engineering review back from the fab for the probes
<azonenberg>
My gerbers i originally designed for the oshpark stackup are a near perfect match to the new rogers stackup
<azonenberg>
like, the impedance is off by 0.8%
<azonenberg>
Which pretty much confirms my initial thoughs from the simulations and such
<azonenberg>
namely, FR408HR and RO4350B are almost perfect drop-in replacements for one another
<azonenberg>
other than the rogers having ~1/3 the loss tangent
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[starshipraider] azonenberg pushed 2 commits to master [+4/-0/±4] https://git.io/JJqfk
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[starshipraider] azonenberg ba1fab8 - Added LA etc to mead-bringup FPGA image
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[starshipraider] azonenberg dd038d2 - Added terminator to Spartan-7 system clock since LVCMOS33 bank doesn't have ODT on LVDS_25
<lain>
oh nice
<azonenberg>
So i started firmare dev for the I/O pod FPGA
<azonenberg>
i really wanted to do two things... first, verify i have enough gate capacity on the xc7s6 and second, sanity check clocking etc against the PCB pinout
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[starshipraider] azonenberg pushed 1 commit to master [+4/-0/±0] https://git.io/JJqJz
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[starshipraider] azonenberg be2723a - Initial skeleton of pod FPGA design
<azonenberg>
monochroma, lain: so i just got off the phone with TRS-RenTelCo support
<azonenberg>
I did a bit more digging into what's happening on my scope
<azonenberg>
On the 5 mV/div setting in 50 ohm mode, channel 4 appears to AC couple the input, or apply a large DC offset to it
<azonenberg>
unclear which
<azonenberg>
it's correct at both lower and higher gain settings
<azonenberg>
It has a 1-year warranty and i bought it in January
<azonenberg>
So i'm covered. The night shift service guy can't do shipping stuff, but during business hours tomorrow i should get a contact from them with a prepaid shipping label to send it back for a free repair
<azonenberg>
i'm almost certain one step in the frontend attenuator is bad and they're going to have to swap out the board or at least replace the attenuator
<azonenberg>
What i think happened is that they split the AC and DC components in the front end, and the DC path failed open at this step
<monochroma>
azonenberg: do you think this is something that developed while you had it, or just an un-noticed long standing problem?
<azonenberg>
I think the latter
<azonenberg>
I fill out probes left to right when setting up experiments so channel 4 gets less use than the others
<monochroma>
same
<azonenberg>
you only see it at really high gain settings (5 mV/div with a 1x probe or 50 mV/div with a 10x probe)
<azonenberg>
i almost never go that high up since i'm normally probing 1.8-3.3V logic levels
<azonenberg>
So it's very likely it could have been bad the whole time and i didn't notice
<azonenberg>
i only found it when using a 20x probe on a very weak signal
<azonenberg>
and saw it disappear as i turned up the gain
<azonenberg>
i think it's unlikely i damaged the input because the only time i do direct 50 ohm inputs is to SERDES or other equally low level signals
<azonenberg>
none of that stuff is physically capable of exceeding the 5V max of the scope
<azonenberg>
And with a 10x probe i'd need 50V at the probe tip to kill it
<azonenberg>
basically the only signal i even have on most of my boards that's >5V is 12V input power
<azonenberg>
so the only way i could have overloaded the input is if i touched a 50 ohm 1x probe (which i don't have), or a bare sma center contact, to the +12V input
<azonenberg>
this seems incredibly improbable
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[starshipraider] azonenberg pushed 1 commit to master [+2/-0/±3] https://git.io/JJqOe
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[starshipraider] azonenberg ca9d353 - Finished initial implementation of pod FPGA design. No pin constraints except for clock and QSPI because PCB layout is still in progress.
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[starshipraider] azonenberg pushed 1 commit to master [+0/-0/±3] https://git.io/JJqOF
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[starshipraider] azonenberg bcbfc47 - Fixed bugs causing some channels to be optimized out
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[starshipraider] azonenberg pushed 1 commit to master [+0/-0/±1] https://git.io/JJq3b
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[starshipraider] azonenberg 066ca94 - Added command to read alert outputs from INA233s
<azonenberg>
ok so, 58% LUT load, 8% LUTRAM, 31% FF, 71% IO
<azonenberg>
And this is a software limited fpga so i should be able to run right up to 100% capacity without congestion issues
<azonenberg>
Still need to implement flash writes for firmware updating and turning pods on/off or querying pod status via SPI, but there's plenty of gate capacity left for that
<azonenberg>
So the xc7s6 should be good to go on this board
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[starshipraider] azonenberg pushed 1 commit to master [+0/-0/±1] https://git.io/JJqc3
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[starshipraider] azonenberg 2874acb - Initial placement and power routing on I/O FPGA
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[starshipraider] azonenberg pushed 1 commit to master [+0/-0/±19] https://git.io/JJqCp
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[starshipraider] azonenberg d6f05d4 - Initial routing from I/O FPGA to rightmost 2 probe pods
<azonenberg>
I like this new placement for the spartan, way off in the far right so it's not blocking too much access to the kintex
<Degi>
Neat
<azonenberg>
I have 2 of the 12 pods hooked up to it so still lots of work to do, but getting there
<azonenberg>
still obviously lots of work to do on the power supply too
<Degi>
The small FPGA did UART and communication with the µC about pod status, right
<azonenberg>
Yes
<azonenberg>
It's got a 32-byte fifo for tx and rx on each pod's uart
<azonenberg>
then a time delay from presence detect to hotswap power enable
<azonenberg>
instant power down when pod is removed
<azonenberg>
alert inputs from the ina233s for each pod to detect out-of-range conditions
<Degi>
neat
<azonenberg>
then a spi interface to the mcu for controlling all of it
<Degi>
Hardware alert inputs?
<azonenberg>
Yeah
<azonenberg>
so it can shut down a pod on overcurrent etc
<Degi>
neat
<azonenberg>
that's not implemented, right now all you can do is query alert pin status over the spi interface, but the pins are connected
<azonenberg>
(i have most of the fpga firmware written already, it was pretty trivial lol)
<azonenberg>
There's still room for more stuff, right now there's no way to force a pod to be powered on/off but i wanted to have that for debug
<azonenberg>
and while i have a qspi flash controller in there, all you can do so far over the uc interface is query the capacity of the attached flash chip
<azonenberg>
you can't write a new bitstream to it yet
<azonenberg>
But the fpga is only about 50-60% full so there's plenty of room for all of that to be added later
<azonenberg>
this is encouraging, the fraction of the board that doesn't look like it got attacked by spiders is shrinking :p
<Degi>
neat
<azonenberg>
there are now nontrivial portions of the board that don't have any ratsnest lines at all
<azonenberg>
Once layout is netlist-complete i'll be far from complete though, i'm going to be optimizing a lot of routing to try and use less vias, space signals out to reduce crosstalk, generally make things look nicer
<azonenberg>
silkscreen tweaks, i still have to do power pour layout
<Degi>
less vias? For highs peed signals?
<azonenberg>
Yeah, and just to improve manufacturability
<Degi>
Hmh, dont fabs like thousands of vias
<azonenberg>
right now most of the long range interconnect is using autorouter-style strict X/Y biasing
<azonenberg>
Which leads to more vias than necessary, but is easy to do
* monochroma
giggles at "high peed signals"
<azonenberg>
So i'll fine tune and remove redundant vias later
<Degi>
lol
<azonenberg>
monochroma: it's what happens when you smoke too much marijuana and piss on the board
<Degi>
heh
<azonenberg>
the THC-containing urine changes the effective dielectric constant of the signals
<monochroma>
of course :P
<azonenberg>
anyway, i have over 2k vias on this board and i havent even started fanning out the big FPGA
<azonenberg>
i fully expect to be over 3K when i'm done
<Degi>
Well I've left some water in the vac chamber haha
<Degi>
To be more precise, a piece of Aloe Vera whose vacuum behaviour I wanted to study
<Degi>
Though that vacuum chamber usually only got to -4 or -5 anyways (the turbo itself could do -7 sucking on a flange with a vacuum gauge attached) since the vacuum chamber had all viton seals and broken electrical feedthroughs fixed with epoxy and some screw fittings with PTFE tape and probably lots of vapor absorption. Got to -6 sometimes
<azonenberg>
lol
<Degi>
But it was possible to vent the vacuum chamber with a valve to like -4 haha. If you found exactly the right position. Otherwise it went up to -1 and the pump got louderh aha
<azonenberg>
i'm used to SEMs with ion pumps etc that get to -10 or so in the gun area
<azonenberg>
Also wooo that was fast
<Degi>
Fast?
<azonenberg>
new MEAD enclosure + probe shells shipped
<Degi>
Oh neat!
<Degi>
(My turbopump shipped in a day despite DHL saying it'd take a week haha)
<Degi>
I mean an ion pump wont make sense there anyways with the plexiglass cover and viton seals haha
<Degi>
Getting to 10^-4 with standard PCBs with all kinds of gunk and rosin on them (I think I cleaned them quickly with isopropyl once) and a CD drive mover (cleaned with acetone for a while, left green residue in the acetone bath haha)
<Degi>
Motor driver IC worked surprisingly well in the vacuum.
<miek>
100mm diameter, i didn't realise it was so huge till it arrived
<Degi>
Huh 100 mm
<Degi>
What do you need that for? Viewing stars in infrared?
<miek>
nothing in particular, it's just handy to have a narrower FoV sometimes. though i would like to play with stitching panoramas. i wish it were narrow enough to look at stars :)
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<Degi>
Oh, so the bigger lens narrows the FOV
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<lain>
shiiiny
<miek>
the anti-reflective coating is surprisingly reflective :p
<lain>
hehe
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<azonenberg>
miek: i want one of the thermal lenses flir puts on the Safire, lol
<azonenberg>
That lens alone probably costs a quarter million or so
<miek>
lol, yeah
<azonenberg>
Friends who go to arms dealer shows say that a full safire system including the full 1080p thermal FPA and helicopter-ready turret etc costs a bit over a mil
<azonenberg>
i couldn't justify the price even if i had the money, but i still want one :p
<miek>
there's a periscope from a tank (with both visible & thermal lenses) sitting on ebay at the moment, that i'm trying not to buy