<cr1901_modern>
Well, stage 1 compilation bombs with a very informative "Unknown error". That's good.
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<qu1j0t3>
:(
<openfpga-github>
[openfpga] rqou opened issue #103: Timing analyer warns on all loops, not just combinatorial loops https://git.io/vHDlV
<azonenberg>
rqou: hmm, i think that might be kinda a duplicate of #39
<azonenberg>
i didn't close the "post-part timing analysis" ticket because it isnt finished yet :p
<14WAA7YSF>
[openfpga] rqou commented on issue #103: @azonenberg wants to close in favor of #39 https://git.io/vHDlx
<92AAA881N>
[openfpga] rqou closed issue #103: Timing analyer warns on all loops, not just combinatorial loops https://git.io/vHDlV
<azonenberg>
interesting, why weird usernames for the github bot?
<openfpga-github>
[openfpga] rqou commented on issue #39: - [ ] ```<azonenberg_work> [Blinky] has a stateful feedback loop in a fabric-based (vs hard IP) counter... https://git.io/vHD8f
<azonenberg>
aaand that one is fine
<azonenberg>
huh
<rqou>
"cloud"
<rqou>
:P
<azonenberg>
rqou: see PM
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<rqou>
holy shit the FB ordering in the xilinx pinout tables isn't consistent
<rqou>
pages that list only 2 FBs go left->right
<rqou>
pages that have 4 go top left -> bottom left -> top right -> bottom right
<azonenberg_work>
lolol
<azonenberg_work>
Is it possible
<azonenberg_work>
that this reflects the actual die structure?
<azonenberg_work>
like, going outward from a center spine or something
<rqou>
probably not
<azonenberg_work>
with even addresses on one side and odd on the other or somethig?
<rqou>
although XAPP399 almost certainly tells you the die structure
<rqou>
i think this is just the table layout conventions
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<openfpga-github>
[openfpga] rqou pushed 9 new commits to master: https://git.io/vHD0T
<openfpga-github>
openfpga/master 2675b65 Robert Ou: xc2bit: Add some basic plumbing for 128 macrocell
<openfpga-github>
openfpga/master 0910a3b Robert Ou: xc2bit: Add 128-macrocell ZIA encoding
<openfpga-github>
openfpga/master 265ca6d Robert Ou: xc2bit: Add deliberately-incorrect ZIA data for 128-macrocell parts
<rqou>
apologies for the ugly; working on cleaning that up next
<azonenberg>
the ethernet test fails after one iteration
<azonenberg>
thinking it has an optimal placement
<azonenberg>
when it clearly does not
<azonenberg>
So my cost function must not properly be handling that
<azonenberg>
aha
<azonenberg>
introduced the bug in the constification
<7GHAA6GY0>
[openfpga] azonenberg closed issue #102: Ethernet test fails to route (using 110% eastbound cross-connections) https://git.io/vHDIH
<18WAAEKFX>
[openfpga] azonenberg pushed 2 new commits to master: https://git.io/vHD0A
<18WAAEKFX>
openfpga/master 365c790 Andrew Zonenberg: Timing: report number of paths being analyzed
<18WAAEKFX>
openfpga/master 25589f1 Andrew Zonenberg: Greenpak4PAREngine: Fixed bug introduced by const-ification causing routing congestion to be ignored. Fixes #102.
<azonenberg>
So i guess the next step is to have it correctly understand flipflops etc
<azonenberg>
But before i do that i want to refactor the timing data acquisition code a bit
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<openfpga-github>
[openfpga] rqou pushed 1 new commit to master: https://git.io/vHDEF
<openfpga-github>
openfpga/master 2e8f215 Robert Ou: BUGFIX: Fix some more bugs resulting from const cleanup...
<rqou>
azonenberg: sorry about that. TIL you can overload on const-ness
<rqou>
and gcc silently accepts it without warning
<rqou>
I should switch to building with clang
<rqou>
clang warns in this case
<rqou>
this is a nice footgun/unfeature
<azonenberg>
i need a good linter
<rqou>
i legitimately didn't even know that was possible
<azonenberg>
There is no good use for it
<azonenberg>
if a function is const, it is
<azonenberg>
if it modifies the object, it's not
<azonenberg>
why would you ever have a function that can be both?
<azonenberg>
So definitely should warn
<rqou>
clang does
<rqou>
i see _this_ is what people meant when they said gcc errors are inferior
<rqou>
writing mostly C (and embedded C) i didn't really notice
<azonenberg>
well maybe we can switch over to clang at some point
<rqou>
you already can
<rqou>
CC=clang CXX=clang++ cmake
<azonenberg>
i meant as default
<azonenberg>
is there an option to do that?
<rqou>
not really
<rqou>
our cmake is pretty borked in terms of "options"
<rqou>
also, the test matrix gets bigger and bigger the more options you add
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<cyrozap>
Does the CI system for openfpga build with both gcc and clang? I like to do that on my projects to: 1.) Make sure that my code can build with both compilers. 2.) Get ALL THE WARNINGS!
<rqou>
i thought the CI system barely ran period?
* cyrozap
doesn't know
<rqou>
i have a "public service auto-build machine" that's not CI
<rqou>
it's nightlies only
<rqou>
and the build is broken right now because i haven't installed libudev-dev on the server
<cyrozap>
I mean just a simple build test, not a full hardware-in-loop CI build. Like on Travis-CI or something.
<rqou>
waiting for somebody (you? azonenberg?) to test the no-libudev rewrite
<azonenberg>
rqou: We have a CI build server running buildbot but it doesnt seem to be working right now
<azonenberg>
it may have something to do with the fact that i unplugged my gpak devkits from the test VM
<rqou>
cyrozap: you can at least examine it and see if i'm way off the mark or not
<azonenberg>
i need moar devkits
<rqou>
you seem to be more familiar with weird linux distro/integration stuff
<azonenberg>
i asked silego for two more as part of this new shipment of awesomeness they're going to send me
<rqou>
hmm yosys is doing something
<rqou>
all builds are busted right now
<rqou>
might be related to my ugly sed hacks that i never got around to upstreaming :P
<openfpga-github>
[openfpga] azonenberg pushed 2 new commits to master: https://git.io/vHDui
<openfpga-github>
openfpga/master 06feeed Andrew Zonenberg: Merge branch 'master' of github.com:azonenberg/openfpga
<openfpga-github>
openfpga/master 24ede80 Andrew Zonenberg: Refactored to do rising/falling measurements in one go
<cyrozap>
I like Travis because you need to pull in all dependencies for each build, so if you add a dependency without adding it to the Travis script, or if you have a weird version of a lib installed locally that doesn't match what everyone else can wget, the build will fail.
<azonenberg>
cyrozap: yeah we used to use travis
<azonenberg>
but it didnt have the ability to run HIL tests
<azonenberg>
So we switched to buildbot
<azonenberg>
Also, this is what Splash does
<azonenberg>
you can't even use libc without going through its internal dependency resolution process
<rqou>
meanwhile i'm here running jenkins with a slave running in a jvm on qemu-user-static on an lxc container
<rqou>
:P
<azonenberg>
so you're guaranteed hash-identical inputs for the same build on two boxen
<azonenberg>
(not necessarily identical outputs, as the compiler may add timestamps etc)
<cyrozap>
You can do both, though. Travis builds just to make sure it works on all OS/compiler combos, then buildbot for HIL.
<azonenberg>
Yeah i guess
<azonenberg>
Definitely something to think about
<azonenberg>
cyrozap: btw what is the current status of the psoc work?
<cyrozap>
On hold while I work on other projects :P
<cyrozap>
I'll come back to it eventually.
<azonenberg>
Lol that works
<cyrozap>
Once I start working on it again, the first step will be to write a UDB/DSI/routing memory-dump-to-netlist/Verilog script, so we can check our bitstreams.
<azonenberg>
:D
<azonenberg>
also, stencil for the PMOD -> 8x MMCX board came in today
<azonenberg>
still waiting on PCBs
<azonenberg>
still have two more greenpak characterization boards to design
<cyrozap>
We certainly have enough info at this point. pointfree's diagrams really helped me visualize everything and match it all up with the patents.
<rqou>
and see if this is totally busted or reliable enough?
<rqou>
i tested it on a number of platforms, but they're all debian-based
<rqou>
i don't know if a "more infected with systemd" distro like fedora would work or not
<cyrozap>
rqou: Again, I have no hardware to test with.
<rqou>
no, i meant "look at how i implemented the code"
<rqou>
it pokes sysfs a bunch
<cyrozap>
I've never done anything with sysfs before, so I'm not sure how useful my review will be :/
<rqou>
ah ok nvm
<cyrozap>
I mean, nothing programmatically
<azonenberg>
Off to get some sleep
<azonenberg>
This is gonna be a busy weekend so i'll try to get coding in when i can