<davidrysk[m]>
yeah but fabric cache is closer to L3-level while RAM is RAM
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<Bluerise>
marcan: from a friend who works on arm stuff:
<Bluerise>
'during power collapse, WFI could remove all register contents.'
<Bluerise>
'the issue is that WFI is not expected to power collapse unless an external register (power control) enables it.'
<Bluerise>
'if it power collapses, the resume mechanism may be 'interesting''
<marcan>
Bluerise: this is why there is a register for this
<marcan>
I already told never_released that we should go that way
<marcan>
agraf suggested this too
<marcan>
set the register to only clockgate on wfi
<marcan>
then in a cpuidle driver, when we need to go into deeper sleep, flip the bit, wfi, flip back
<marcan>
with the appropriate register saving
<davidrysk[m]>
Bluerise: I'm wondering if iBoot leaves the power control register in the enabled state
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<never_released>
davidrysk[m]: iBoot has it at the destroy-state-on-WFI default
<modwizcode>
is there a reason that's the default?
<sven>
because apple only has to care about xnu :)
<sven>
we could probably just set it to clockgate only in pongoos/m1n1/whatever bootloader we end up using
<sven>
(at least for now)
<modwizcode>
oh sorry I thought you meant it's an ARM default to be in that state which didn't make sense to me.
<jix>
do other arm cores even implement optional power down via wfi at all, or is that an apple only thing?
<modwizcode>
Yeah the A57 TRM talks about it that's where I read about it in the first place
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<opticron>
pretty sure it applies to the A53 as well
<never_released>
jix: other cores do
<never_released>
well at least _some_ of them
<never_released>
what Apple does is within the spec
<modwizcode>
Yeah I think it's standardized (at least that it can happen) although I cannot find the part where it talked about losing register state but I know I saw a thing about that too.
<opticron>
yeah, I don't remember reading about register state when I read about WFI, but I could have glossed over it
<never_released>
opticron: explicitly not covered.
<never_released>
> The architecture does not define the exact nature of the low-power state, except that the execution of a WFI
<never_released>
instruction must not cause a loss of memory coherency.
<never_released>
no more details
<modwizcode>
Ah that's the note I was looking for
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<danb91>
hi all, i've just started following asahi and I’ve been looking through the GPU code and bloom’s articles (congrats on getting the triangle up!). Do we know yet how IOConnectCallMethod is sending data to the GPU (i.e. what MMIO addresses, etc)?
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<roxfan>
afaik nothing specific yet, but you can probably find some info in ioreg output or device tree
<roxfan>
iirc someone here made device tree dumper
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<danb91>
roxfan will look for that. thanks!
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