08:28 <brads> AntonioND: S905 datasheet mentions A53 (SCU/L2), the L2 and CPU0 must all be enabled together (ie minimal A53 domain powered up) so I guess the reverse might be true also? page 47.

08:31 <brads> Alot of the old amlogic 3.14 code has drivers which specifically set cpu affinity to cpu0 as well, I found out trying to move thier cpu affinities testing realtime apps.

18:37 <AntonioND> ok, so I think I give up on CPU0. I'm reading the registers in the datasheet in section 18.5. I print the registers whenever I turn off/on a CPU, and it looks like CPU0 isn't actually turned off or anything. all the bits related to cpu0 always say "on". no bits in the registers change, but they do change for the others. I don't know if this is a soc limitation or because of how the SCP binary works, but the

18:37 <AntonioND> fact is that CPU0 can't be turned off. the datasheet hints at it in section 18.1. I'm quite sure right now that somewhere there is some kind of protection that I can't bypass. maybe reversing the SCP binary can reveal that it can actually be done, but I think I can't do anything from the TF about this.

18:37 <AntonioND> as another shitty test I've made each cpu wait in a putc() loop instead of wfi() until they are powered off, and all of them are powered off after ~60 characters but cpu0 keeps printing characters

18:44 <AntonioND> oh, well, it was worth a shot

18:46 <AntonioND> i'll just reject cpu_off calls from cpu0 and tell linux in the DT that it isn't allowed