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<plaes>
hrm.. what was the proper way to kill spam page..
<KotCzarny>
dont leave traces of it in history
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<icenowy[m]>
tkaiser: according to the BU3 people
<icenowy[m]>
H3 BSP based on 4.4 kernel is out
<plaes>
o__O
<plaes>
ok.. spam fixed
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<KotCzarny>
icenowy: yay, on github?
<icenowy[m]>
nope
<icenowy[m]>
not delivered
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<KotCzarny>
then it's not out
<KotCzarny>
;)
<KotCzarny>
btw. is that rumoured droid7 for h3?
<KotCzarny>
or just backported kernel?
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<icenowy[m]>
KotCzarny: I think it come with android7
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<smaeul>
out of curiosity, more than anything, is it possible to find out what toolchain Allwinner uses to compile the ARISC firmware?
<smaeul>
no version of or1k-gcc or combination of flags I've tried was able to reproduce its style of code generation
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<junnie>
Hi everyone, do you know how to run secure boot without burning secure mode bit? I want to test before burning it, because the risk of bricking the board.
<smaeul>
you can't
<junnie>
The file bin/uart0-helloworld-sdboot.toc0 in sunxi-tools of toc0 branch does not boot.
<junnie>
wow, so I have to take risk :(
<smaeul>
there are two boot ROMs, and only one is mapped into the physical address space. which one depends on that secure mode bit
<smaeul>
if someone dumped the secure BROM from a device in secure mode, theoretically you could run it on a device in non-secure mode (it should be position independent, so you could load it into SRAM)
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<smaeul>
"On startup, the H6 V200 will read the Secure Enable Bit, if the bit is 0, then mapping Normal Brom code to address 0x0, or mapping Secure Brom code to address 0x0."
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<junnie>
I see, if the secure boot BROM can be run in non-secure mode, I can test my toc0 binary parsing/check with the BROM and boot my toc0 binary.
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<junnie>
But you use word theoretically, so I guess nobody ever test this method.
<smaeul>
I haven't seen the secure BROM yet :) (though I'd really like to!)
<junnie>
hi everyone, I have one H2+ board in hand, H3 actually. If someone is willing to help dump secure BROM, I can have a test to run secure mode boot with secure BROM in non-secure boot.
<junnie>
smaeul: thanks!
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<junnie>
beeble: hi, what do you suggest for second stage of secure boot? In my understanding, toc0 only make sure the boot0 image is secure with check certification, the boot0 should do the task to verify the next stage binary's certification. But boot0 binary size limitation shall be small, not sure it is still 32KB.
<beeble>
not sure if you really wanted to ask me. but u-boot supports signed fit images. so you would have spl signed for for toc0, and that would verify the fit image of u-boot proper (and atf for 64bit architectures)
<junnie>
So BROM verify toc0(spl), and spl verify uboot, right?
<beeble>
yes
<junnie>
I see, thank you very much!
<beeble>
and then you can have a fit image for kernel and so on
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<beeble>
see CONFIG_FIT_SIGNATURE in u-boot
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<beeble>
don't have numbers at hand, but i think it fits into the 32k
<junnie>
Will check it ;) thanks!
<tkaiser>
icenowy[m]: Allwinner's BU3 is the one that doesn't know about github yet, true? They will throw around with giant tarballs when ready?
<icenowy[m]>
it's possible
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<tkaiser>
icenowy[m]: Have you done something useful with the H64 prototype yet?
<icenowy[m]>
nope
<icenowy[m]>
the DDR failed to init
<tkaiser>
:(
<icenowy[m]>
engineer from AW is checking
<tkaiser>
O, that's good news! :)
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<tkaiser>
beeble: With your RK3399 design... did you ever test PCIe 'performance' (asking since I wonder how to test this -- my only approach would be to use a controller known to saturate PCIe lanes and measure a layer above, eg. SATA)
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<beeble>
tkaiser: initial tests with standard controller usb and sata as it's the easiest to implement with standard tools. now some work is done with fpgas, but more for latency then for speed
<beeble>
please add some interpunctuation so the sentence makes sense :)
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<tkaiser>
:)
<beeble>
tkaiser: h6 is single lane right?
<tkaiser>
Yep
<beeble>
so sata an ssd and fio would be a good start i think
<beeble>
damn, today i really type like crap. sorry for that
<tkaiser>
Yes, same idea. Even an el cheapo ASM1061 should do
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<beeble>
tkaiser: just don't forget to turn your iodepth in fio up. but you probably are aware of how to use fio correctly
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<tkaiser>
beeble: Yep, but I've H6 board around. We need to ship an ASM1061 + Samsung Pro 850 with at least 256 GB to icenowy[m] and let her test ;)
<tkaiser>
*no H6 board around
<beeble>
hmm, didn't the h6 board has a m2 connector? (didn't follow it closely)
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<vagrantc>
wens, montjoie: i tried pulling patches from linux-master to add back in dwmac-sun8i ... and the ethernet was recognized, but not functional ... would the emac vs. phy bindings likely cause that?
<vagrantc>
on top of 4.14
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<Putti>
vagrantc, do you have ip address?
<Putti>
I had to run dhclient manually for some reason in debian based rootfs (which has not been normally the case with other devices)
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<vagrantc>
Putti: no, it was statically defined ip
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<vagrantc>
actually, now i'm forgetting if the interface was recognized at all
<vagrantc>
rebooted back to 4.13-rc7, the last version i tested that still worked
<Putti>
ok
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<vagrantc>
oh, yeah, the ethernet interface didn't even get detected
<vagrantc>
on orange pi plus2 (h3)
* vagrantc
might have failed to backport the right patches, too
* vagrantc
pulled nearly all changes to the device-trees and drivers/net/ethernet/stmmac
<Putti>
vagrantc, if you can share us your repository and kernel messages I could take a look
<Putti>
vagrantc, btw, have you enabled the kernel config?
<vagrantc>
CONFIG_DWMAC_SUN8I=m
<Putti>
and do you load the module?
<vagrantc>
i think i'll just build from master and test to see if it works
<vagrantc>
shouldn't need to load the module; normally loads automatically