#linux-sunxi on 2018-09-03 — irc logs at freenode.irclog.whitequark.org

2018-08-03 10:18 rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*

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04:03 <wens> MoeIcenowy: fyi, bluetooth/hci_h5.c now has support for rtl8723bs (but no dt binding)

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04:15 <MoeIcenowy> wens: with fw uploader?

04:15 <MoeIcenowy> capable of serdev?

04:17 <MoeIcenowy> oh interesting it's for acpi now

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04:41 <wens> yeah, like I said, missing dt

04:41 <wens> btw, are you going to update the h6 usb series?

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06:44 <MoeIcenowy> wens: yes

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10:14 <jaganteki> mripard, I'm trying to understand ccu_mp_find_best from ccu_mp.c can't we get best m, p numbers w/o parent rate?

10:19 <mripard> jaganteki: since it's factors from the parent clock, you need to have the ratio between the parent clock and the rate you want to achieve

10:22 <jaganteki> mripard, Ok thanks. I'm trying to implement the mp for u-boot and we have set_rate with input rate and no parent rate.

10:22 <jaganteki> I think I can get the parate rate based on parent index.

10:22 <jaganteki> by reading appro PLL's

10:23 <mripard> the parent might not be a PLL

10:23 <mripard> and PLL's can have other PLL as parents

10:28 <jaganteki> so don't we have common way to get parent rate

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10:44 <jaganteki> mripard, but how come the Linux get the parent clock in the CLK core level itself like w/o knowing sunxi

10:45 <wens> jaganteki: when the clks are first registered, the core reads out (using the clk ops) the parent and current rate

10:46 <wens> jaganteki: so it knows what clk has what parent

10:46 <wens> and it also caches the settings (unless you tell it not to)

10:46 <wens> in other words, the clk core has a complete picture of the clk tree

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10:47 <wens> unless you fed it bad info (such as bad bit offsets or incorrect clk parent names)

10:48 <wens> jaganteki: you can try following allwinner's driver's implementation if you don't want to implement the whole clk tree managing infrastructure

10:49 <wens> big clk_get_{rate,parent) function with a select/case handling each knows clk index

10:49 <wens> it's not pretty, but then again u-boot doesn't have support each and every clk

10:49 <wens> jaganteki: keep it simple and minimal

10:49 <jaganteki> wen, yes I'm thinking of set/get rates.

10:50 <wens> jaganteki: I feel like you keep biting off more than you can chew

10:51 <jaganteki> Initially ie what I tried and call set_rate of specific driver by passing off, bits

10:52 <jaganteki> but looking for handling the same in clock driver iteself by giving m, p or etc divers

10:52 <jaganteki> like Linux does.

10:53 <wens> you mean a common function to calculate m/p? that's nice to have

10:54 <wens> I think you could just open code the bit ops though

10:54 <jaganteki> but the problem is about computation of mp based on parent rate

10:54 <wens> you might not have that much common bit ops code if you are only implementing a small subset

10:54 <jaganteki> u-boot can't preserve this

10:55 <wens> can't you just call clk_get_rate(parent) in clk_set_rate(child)?

10:55 <jaganteki> true ie what I'm thinking

10:55 <jaganteki> by knowing parent index based on mux inputs

10:56 <wens> correct

10:56 <jaganteki> but I don't know whether this is possible for all cloks required in u-boot

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10:56 <wens> why not?

10:57 <wens> everything eventually uses HOSC or LOSC

10:57 <jaganteki> we have DE2, tcons etc

10:57 <jaganteki> those have parents of parents

10:57 <wens> mostly it's HOSC->PLL->(MIPI PLL)->mod/bus

10:57 <jaganteki> may be it's possible

10:57 <jaganteki> OK, let me try this

10:57 <jaganteki> thanks

10:57 <wens> well then clk_get_rate(parent) should call clk_get_rate(parent of parent)

10:57 <wens> :)

10:58 <wens> linux just handles the recursion for you by preparing the values beforehand

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11:01 <jaganteki> true.

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11:15 <naggety> Hi. I'm using TV Decoder and, looking to R40 manual, in register TVD_WB1 you can choose between planar and mb modes. Anybody knows what is MB mode?

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12:40 <MoeIcenowy> jernej: yes surely there's something that the clock parent is kept as pll-video0 on A64 HDMI

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12:40 <MoeIcenowy> when the clock tree shows hdmi phy/tmds and tcon1 are all under pll-video1

12:40 <MoeIcenowy> shutdown pll-video0 shuts down hdmi either

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12:57 <MoeIcenowy> now I think I need some way to check what's kept under pll-video0

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13:09 <MoeIcenowy> jernej: strange, when I shutdown HDMI clock when HDMI display is on, the display is still on

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13:14 <MoeIcenowy> jernej: at least I proved that pll-video switch in A64 HDMI PHY doesn't work as expect

13:14 <MoeIcenowy> I will drop it

13:15 <MoeIcenowy> jernej: I will change the dual PLL HDMI PHY compatible to sun8i-r40-

13:16 <MoeIcenowy> maybe I need to also test on R40

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13:22 <MoeIcenowy> on R40 the switch works

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13:36 <MoeIcenowy> jernej: patches regarding this is sent.

13:40 <MoeIcenowy> wens: how will you solve R40 HDMI problem in v4.19?

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13:52 <pgreco> Moeicenowy, https://patchwork.kernel.org/patch/10576635/ ?

13:54 <MoeIcenowy> oh it's fixed

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14:09 <martinayotte> jaganteki: I've search on irc about X32KFOUT and found that you were trying to make it work for WiFi attached to it, did you succeeded ?

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14:18 <DonkeyHotei> [Mon 2018-09-03 05:58:39 AM PDT] * jaganteki has quit (Ping timeout: 252 seconds)

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14:35 <jernej> MoeIcenowy: so you came to same conclusion as me

14:35 <jernej> btw, some of us believe that hdmi clock doesn't have any purpose

14:36 <jernej> contrary to the response I got from AW

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14:54 <MoeIcenowy> jernej: so that I can never know what's the usage of

14:54 <MoeIcenowy> PLL on TMDS clock?

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14:55 <jernej> MoeIcenowy: sorry, I'm not sure what you mean

14:55 <jernej> it seems that TMDS (HDMI) clock is not used at all

14:55 <MoeIcenowy> so maybe I'll be not able to check whether TMDS supports pll-video1 or not

14:56 <MoeIcenowy> because the clock is even not sensible

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14:56 <jernej> I'm not sure how to check that either

14:56 <jernej> apart to check their verilog code

14:56 <jernej> which obviously won't happen

14:57 <MoeIcenowy> so let us keep TMDS clock

14:58 <MoeIcenowy> and drop PLL-VIDEO1 from PHY clock

14:58 <MoeIcenowy> is PHY clock necessary for reading EDID?

14:59 <jernej> I think DDC clock is sourced from hdmi_slow (or whatever is called in A64)

14:59 <jernej> so probably not

14:59 <MoeIcenowy> but I sometimes met EDID readout failure on Pinebook HDMI

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15:00 <MoeIcenowy> (maybe it's my HDMI C-A converter's fault

15:01 <jernej> check contents of HDMI_I2CM_SS_SCL_HCNT_0_ADDR and HDMI_I2CM_SS_SCL_LCNT_0_ADDR registers

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15:02 <jernej> it is my understanding that those two registers determines DDC I2C clock period

15:04 <MoeIcenowy> it's divided from HDMI_SLOW?

15:04 <MoeIcenowy> I will recheck with Pine A64-LTS, and if it works well I will assume converter fault

15:04 <jernej> one is for how much hdmi_slow cycles signal is high and another how much hdmi_slow cycles signal is down

15:04 <jernej> it's not standard divider

15:04 <jernej> at least that's my understanding

15:05 <jernej> you should get a range of 100 kHz

15:06 <MoeIcenowy> it's like a PWM?

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15:06 <jernej> standard value is HDMI_I2CM_SS_SCL_HCNT_0_ADDR = 0xd8 and HDMI_I2CM_SS_SCL_LCNT_0_ADDR = 0xfe

15:06 <MoeIcenowy> btw maybe my delay clock set patchset lead to the issue

15:06 <MoeIcenowy> I will check then

15:08 <MoeIcenowy> jernej: could you review https://github.com/Icenowy/linux/tree/a64-de2-v4-remaster ? if it's ok I will send it tomorrow

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15:15 <jernej> MoeIcenowy: apart from two minor comments, it looks good

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18:09 <CSoto_> Hi, I'm trying to get working a board (sopine A64) with mali driver and xf86-video-armsoc, but xorg stays blank. I'm launching xterm to test but nothing

18:10 <CSoto_> Xorg.0.0.log does not show any errors. I'm getting stuck :(

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19:16 <parco> CSoto_: have you tried libdrm modetest?

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19:48 <CSoto_> parco: No, but I'll do it right now

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20:06 <CSoto_> OK, modetest says "no device found". I'm using Buildroot's libdrm, and I'ms suspecting I need to use libdrm with sun4i support

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20:14 <jernej> CSoto: just do "modetest -M sun4i-drm"

20:17 <CSoto_> "failed to open device 'sun4i-drm': No such file or directory"

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20:26 <jernej> so, did you patch in A64 DRM driver?

20:26 <jernej> cause it's not yet in mainline

20:27 <jernej> additionally, sopine is in general headless

20:28 <CSoto_> jernej, the GEM ioctrl patch? Yes I did it

20:29 <jernej> which kernel do you use?

20:29 <CSoto_> I'm using MoeIcenowy HDMI branch

20:30 <jernej> ok, and you have sopine board?

20:30 <CSoto_> HDMI is working, and I've got xorg working if I select the fbdev driver

20:30 <CSoto_> but as soon as I switch to the armsoc driver, the screen remains blank

20:30 <jernej> ah, ok, then I don't know

20:30 <jernej> not a fan of X11

20:31 <jernej> btw, did you set CMA size to something reasonable, like 128 MB?

20:31 <CSoto_> I am not really a fan too, but I need it

20:32 <CSoto_> I had that problem with my OrangePi with H3, and the driver complained if the CMA size was too low

20:32 <CSoto_> Now there are no errors, but I'll try anyway

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20:44 <CSoto_> Ooops! I think I found something...

20:44 <CSoto_> "[ 0.397979] sun4i-drm display-engine: failed to bind 1ee0000.hdmi (ops sun8i_dw_hdmi_ops): -517"

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20:54 <CSoto_> jernej, any idea what's going on? I've checked and I've have already selected SUN8I_DE2_CCU & SUN50I_A64_CCU

20:54 <parco> CSoto_: probe deferred

20:55 <parco> something along the line is not ready

20:55 <CSoto_> parco, you're right: probe deferred

20:55 <jernej> do you have hdmi phy node in DT?

20:56 <CSoto_> false alarm, a couple of seconds later "[ 2.031261] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)"

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20:56 <CSoto_> sorry

20:56 <parco> yea, i notice that too when i boot up, it tries a bunch until it's ready

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20:58 <CSoto_> parco, did you see the modetest result?

20:59 <parco> CSoto_: no, did you try running it with -M sun4i-drm?

20:59 <CSoto_> yes, and it returns "failed to open device 'sun4i-drm': No such file or directory"

21:00 <parco> i thought i remember reading somewhere how the r40 display stack just broke all dependency on sun4i-drm...?

21:00 <parco> for next release only, or something like that...

21:01 <parco> i'm working with the a33/r16 so not sure, sorry

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21:15 <CSoto_> strange... I've tried modetest -M sun4i-drm with the X-server down and now it works

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21:22 <CSoto_> Seems to me that something strange happens when the armsoc driver is in use, but I have no idea what it is... I'm quite lost, frankly

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21:47 <parco> CSoto_: what do you see when you run modetest?

21:49 <CSoto_> https://pastebin.com/f8nNLZqt

21:50 <parco> CSoto_: do you have screenshot of color bar test?

21:50 <CSoto_> nope, that's with the x server down so no video

21:54 <CSoto_> sorry, I talk too much and too early

21:54 <CSoto_> I've tried modetest -M sun4i-drm -s 34:800x480-60Hz

21:54 <CSoto_> and I have the color bar on screen

21:55 <parco> is it solid?

21:55 <parco> or animated?

21:55 <CSoto_> solid

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22:02 <CSoto_> well, I'm out for today. I'll keep trying tomorrow. Thank you guys for your help!

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