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14:30
<
hedie >
Hi there. I build a new SystemOnModule containing a Allwinner A13 chip. Now i have problems to let it boot uBoot correctly. Someone here familliar with the A13 and would like to contribute his or her knowledge?
14:31
lurchi_ is now known as lurchi__
14:32
<
hedie >
The problem is, the A13 clocks the SD-Card for some time, then it stops and does nothing else... This can be repeated by reseting the chip
14:34
<
hedie >
the yellow signal is the CLK_N from the DDR-Chip
14:34
<
mru >
sounds like the boot rom is looking for an image and not finding one
14:34
<
mru >
how did you prepare u-boot and write it to the card?
14:34
<
hedie >
i thought exactly the same... I have tried differend things for preparing the Card.
14:35
<
hedie >
there is also a Board with an A13 chip and the same DDR Chip densitiy
14:35
<
hedie >
i tooked this image for testing
14:35
<
hedie >
not working. Also on UART0 no activity
14:36
<
hedie >
then i tried to build my own linux from sources. I did that also for an A10 board. This works without any problems for the A10 board
14:36
<
mru >
I'd build a u-boot with spl debug enabled
14:36
<
hedie >
ok i can do that
14:36
<
hedie >
do you mean with "early debug uart"?
14:37
<
mru >
whatever makes spl print stuff on the uart as early as possible
14:37
<
hedie >
yes i see what you mean. I will also try this. interesting is, that the clocks on the SD-Card always looks the same
14:38
<
hedie >
no difference between the images... Whether self build or from olimex
14:38
<
hedie >
VOltages (3.3V, 1.4V CPU and 1.5V DDR looking perfectly)
14:39
<
hedie >
I think there will be no UART output also during the early stage...
14:39
<
mru >
compare the signals to turning it on with a blank card inserted
14:39
<
hedie >
with no card there is not at least one clock... thats what i can say...
14:39
<
hedie >
now i will try it with a blank card
14:40
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14:47
<
hedie >
just checked
14:47
<
hedie >
here is the result
14:47
<
hedie >
nearly identical with an empty card
14:48
<
mru >
do you have a working board you can compare with?
14:48
<
hedie >
unfortunately no A13 board
14:48
<
hedie >
only a A10 board
14:48
<
mru >
the rom is probably similar
14:49
<
hedie >
yes, as far as i know the A13 is a less complex A10
14:50
<
hedie >
Ok now also measured again CLK-N from the DDR memory
14:50
<
hedie >
now the image looks exactly the same as the one with the "loaded" SD-Card
14:50
<
mru >
my idea is to check if there's more sd card activity with a proper u-boot image
14:50
<
hedie >
ok will test this right now
14:51
<
mru >
if so, you could tell if the rom is loading something that then breaks, or if it's giving up before that
14:51
<
hedie >
thanks so much for your help
14:51
<
mru >
no point spending time trying to debug spl if it isn't even being loaded
14:51
<
hedie >
yes, i had the same tougths
14:52
<
hedie >
i could also attach an logic analyzer and decode the SD-Protocol
14:52
<
mru >
probably more trouble than it's worth
15:01
<
hedie >
looks very simmilar
15:03
<
hedie >
damn... tooked the wrong image
15:03
<
hedie >
but it looked very similar.
15:04
<
hedie >
Ok, here the correct picture
15:05
<
hedie >
one big difference...
15:05
<
hedie >
SCK is high in idle? at the A10 board..
15:28
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15:46
<
hedie >
ok found the first error.
15:46
<
hedie >
i had the uart on the wrong pins... shame on me
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20:14
<
hedie >
hi there. I try to bring up my new board. Actually its loading SPL with u-boot and shows me: DRAM 0MiB
20:14
<
mru >
well, that's some progress
20:15
<
hedie >
i have double checked my schematic twice and comapred with reference boards
20:15
<
mru >
my first guess here would be that you're not configuring the dram properly
20:15
<
mru >
or that there's a fault on the board
20:15
<
hedie >
the only thing i have different are the databits
20:16
<
hedie >
here is a picrue
20:17
<
hedie >
i have changed the bit position to be better routable. I always left B0 and B8 at the correct position since i read that some controllers/memories use the LSB for calibration purposes
20:17
<
hedie >
@mru i have read that there is an autodetect implemented for A10/13 in u-boot
20:18
<
hedie >
could it be better to "hard configure" these settings?
20:18
<
hedie >
actually i have configured the failsafe config:
20:18
<
mru >
no idea, never had to fight that fight
20:18
<
hedie >
+S:CONFIG_DRAM_CLK=360
20:18
<
hedie >
+S:CONFIG_DRAM_EMR1=4
20:18
<
hedie >
+S:CONFIG_DRAM_ZQ=123
20:18
<
hedie >
+S:CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
20:19
<
hedie >
ok @mru but maybe you know how to set bus width etc. in the config?
20:19
<
mru >
can copy the config from some other board with the same ram chip?
20:20
<
hedie >
there is no board with exactly the same RAM chip... But with the same density
20:20
<
hedie >
already did that. same result...
20:20
<
hedie >
U-Boot SPL 2020.01-rc5-00030-gd35803a352 (Jan 11 2020 - 16:57:35 +0100)<\r><\n>
20:20
<
hedie >
### ERROR ### Please RESET the board ###<\r><\n>
20:20
<
hedie >
DRAM: 0 MiB<\r><\n>
20:21
<
mru >
that means the ram size detection didn't find any usable ram
20:21
<
hedie >
maybe due to the fact i have scrumbled the databits
20:21
<
checkpoint >
hedie: have you checked Vref and other voltages to meet your particular DRAM datasheet ?
20:21
<
hedie >
therefore i would like to try to pre-define these settings
20:21
<
hedie >
oh.... @checkpoint
20:22
<
hedie >
i think you could be right...
20:22
<
mru >
I don't see how shuffling the data bits would make a difference
20:22
<
hedie >
just one second
20:22
<
mru >
have you inspected the board for manufacturing faults?
20:22
<
mru >
the bga is going to be bit tricky to check...
20:23
<
checkpoint >
exactly!
20:23
<
hedie >
i have this one:
20:23
<
hedie >
actually you are right, i have the (L) version wich means VDD 1.35V. I power it with 1.5V since the A13 dont support LPDDR.
20:24
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20:24
<
hedie >
but i tought it is a DDR3 chip. not an LPDDR
20:24
* checkpoint
would start troubleshooting DRAM issues with xraying BGA chips
20:24
<
hedie >
But the DS says: Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V
20:24
<
mru >
checkpoint: that assumes you have an x-ray machine
20:24
<
hedie >
@mru yes, i have inspected the board many many times. also soldered two times a fresh BGA
20:25
<
hedie >
i have already soldered dozens of such BGAs for repair and never had much problems
20:25
<
mru >
then again, if you're developing boards with largeish bga chips, you should probably arrage access to such a machine
20:25
<
hedie >
but you are right... one can never be sure 100%
20:26
<
checkpoint >
mru: I sually visit a nearby dantist, seriesly!
20:26
<
hedie >
good idea :)
20:26
<
mru >
I was going to ask if medical xray devices are suitable
20:30
<
mru >
how does a typical dentist react if you show up asking to have random stuff xrayed?
20:30
<
checkpoint >
obvious defects are easily detectable
20:32
<
hedie >
i already had access to an x-ray machine in a previous job
20:33
lurchi__ is now known as lurchi_
20:34
<
checkpoint >
mru: well, I went to a small nearby clinic and got aquainted with its owner, described him the problem... he was very curious to try it
20:34
<
mru >
I avoid using bga chips for personal projects
20:35
* checkpoint
does the same, but DDR3 are available only in BGA packages nowadays
20:36
<
mru >
that's where all the nice SOMs come in handy
20:37
* checkpoint
does not want to be dependant on a one-shot chinese SOM vendor
20:38
<
mru >
they're not all chinese
20:38
<
mru >
there are some nice swiss and german ones
20:39
<
checkpoint >
well, yes. but those add quite some $$ to the BOM
20:39
<
hedie >
good idea with the dentist
20:39
<
mru >
ever heard the saying that you get what you pay for?
20:39
<
hedie >
will look whether i will find one who is willing to help
20:39
<
hedie >
@checkpoint
20:39
<
hedie >
did you saw my board picture?
20:40
<
checkpoint >
hedie: seriosly, screen your BGAs to make sure all there are no soldering issues
20:40
<
hedie >
ok i will do that.
20:41
<
hedie >
But one more thing... If i check the clock lanes from the A13 there is not toggling at all
20:41
<
hedie >
i am curious about how u-boot want to probe the memory without activating the clock at all
20:41
<
hedie >
maybe it is still a configuration problem? and no soldering issue?
20:44
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20:44
<
checkpoint >
hedie: try some old (dated 2014) u-boot, you can get one from Olimex I think
20:46
<
hedie >
would you enable the OnDieTermination? (ODT)
20:46
<
checkpoint >
hedie: they have an SD card image for their A13 OlinuXino boards
20:46
<
hedie >
yes, i found them right now
20:47
<
checkpoint >
hedie: how many chips your have on your board ?
20:47
<
hedie >
just one DDR3 chip
20:47
<
hedie >
plus the CPU
20:48
<
checkpoint >
hedie: no termination is necessary for one chip as far as I know
20:48
<
hedie >
then i will leave it disabled
20:48
<
hedie >
but i cant find any usefull knobs to turn inside of the "make menuconfig" of u-boot
20:49
<
hedie >
all i can set is CLK, ODT, EMR1 and EMR0 register, ZQ and timings
20:50
<
checkpoint >
try u-boot that works on other A13 boards to make sure your board is not faulty
20:51
<
checkpoint >
only after that get to tweaking u-boot options
20:51
<
checkpoint >
hedie: your picture is not openning from here
20:52
<
checkpoint >
oh... it just did
20:52
<
hedie >
does this work?
20:54
<
checkpoint >
what was your average track length mismatch on DDR3 lanes ?
20:55
<
hedie >
none... i made it perfectly mathing expect for the CLK lane
20:55
<
hedie >
all others were +- 0.01mm
20:55
<
hedie >
clk was + 0.5mm
20:56
<
hedie >
i also used special stackup to match the impedance
20:57
* checkpoint
would say it was a well done job if that worked ;)
20:57
<
hedie >
i hope i will get it working
20:57
<
hedie >
this is my 2nd board with DDR3 memory
20:57
<
hedie >
the first one also did work after crossing out the CLK_N and CLK_P traces ^^
20:58
<
checkpoint >
my boards work well even with 2-3mm misalignment
20:58
<
hedie >
this time i double checked it
20:58
<
hedie >
oh nice. then i can take it more easy next time :)
20:59
<
checkpoint >
as long as you have just one DDR3 chip, yes
21:00
<
hedie >
have you more than one DDR3 on your board?
21:01
<
hedie >
unfortunately olimex dont host very old images
21:01
<
hedie >
ftp://staging.olimex.com/Allwinner_Images/A13-OLinuXino/
21:01
<
checkpoint >
I been heard this from many ppl who do a lot of DDR3 tracing
21:02
<
checkpoint >
download any legacy 3.4 image
21:02
<
hedie >
ok i have downloaded A13_SOM_Debian_kernel_34_90_100kHz_I2C_WIFI_USB_LAN_X_touch_256MB_release_1.img
21:03
<
hedie >
now u-boot is older (2014.04)
21:03
<
hedie >
unfortunately, still the same:
21:03
<
hedie >
--------------
21:03
<
hedie >
U-Boot SPL 2014.04-10681-g78592f1 (Jun 06 2014 - 14:25:51)<\r><\n>
21:03
<
hedie >
DRAM: 0 MiB<\r><\n>
21:03
<
hedie >
### ERROR ### Please RESET the board ###<\r><\n>
21:03
<
hedie >
Board: A13-OLinuXinoM<\r><\n>
21:03
<
hedie >
-----------
21:04
<
hedie >
then it must be something HW-Related
21:04
<
hedie >
but damn... what could it be
21:04
* checkpoint
is nearly 100% sure that hedie's board is faulty
21:05
<
checkpoint >
check wireing
21:05
<
checkpoint >
then xray it
21:05
<
hedie >
i have checked the schematics at least 4 times... the schematic is identical to the olimex board in terms of wiring the DDR3 memory
21:06
<
hedie >
i must do xray...
21:06
<
hedie >
i could also buy the exactly same DDR3 chip as it was used on the olimex board
21:07
<
checkpoint >
MT41K256M16 worked well for me
21:08
<
checkpoint >
have you checked soldering on A13 side of the thing ?
21:08
<
hedie >
yes, as good as possbile
21:09
<
hedie >
do you have any recommondation for a "cheap" microscope for at home?
21:09
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21:10
* checkpoint
uses Andonstar ADSM302 HDMI
21:11
<
hedie >
are you happy with it?
21:11
<
checkpoint >
well... it's cheap :)
21:11
<
hedie >
good image quality and also high enough to do some soldering under the lens?
21:11
<
checkpoint >
quite usable
21:11
<
hedie >
ok thanks :)
21:12
<
checkpoint >
there are some videos on youtube
21:17
<
hedie >
wow the ADSM302 is around 180 USD
21:17
<
hedie >
for a chinese product, not that cheap...
21:17
<
hedie >
but the youtube videos looking fantastic
21:17
<
hedie >
i need this :)
21:20
<
checkpoint >
the one without HDMI option is a bit cheaper
21:58
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