<smaeul>
fwiw I've had good luck with 2.0mm <-> 2.5mm cables similar to these: https://www.amazon.com/dp/B07FM72VBF/ both on Pine A64 (WiFi header) and NanoPi M4 (SATA hat USB header)
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<Jin^eLD>
smaeul: but that's "standard" dupont, no? I have these jumpers, but they are a bit bigger, they fit perfectly on the UART pins on the Cubie which are also "standard"
<Jin^eLD>
apritzel: while questioning how reasonable shipping a couple of connectors around the world may be a point, if I need to pay 4x the price for exactly the same connectors, also made in china, locally - then I rather order them directly in China
<Jin^eLD>
true that shipping takes ages sometimes but I got used to that and just try to plan my projects ahead
<Jin^eLD>
the price difference is huge comared to buying locally and really - you get exactly the same stuff in the end
<Jin^eLD>
so the state is just skimming
<Jin^eLD>
it's not like someone is manufacturing the same thing here and they're trying to save local manufacturs
<Jin^eLD>
*manufacturers
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<smaeul>
Jin^eLD: one end of what I linked is the "standard" size. the other end is the smaller 2.0mm pitch
<Jin^eLD>
smaeul: aha, so smaller ones exist... let me try to find them
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<bill-auger>
no it is once per second until i reboot
<bill-auger>
it seems to happen after running the CPU very hot for a long period
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<kmaincent>
hello, according from the datasheet the A64 can boot from raw NAND or SPI NOR. Do you know if it is possible to boot from SPI NAND?
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<apritzel>
kmaincent: I don't think anyone has ever tried, it's more a question of the command/register interface exposed via SPI than the technology, I'd say
<apritzel>
kmaincent: from a quick glance it looks like there is some overlap with the typical SPI NOR protocol (read from cache= cmd 03h), but I think you would first need to load the cache to make this work
<apritzel>
kmaincent: some boards like the Pine64 expose the SPI0/PortC pins on the headers, so you can actually try there
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<kmaincent>
ok thanks, I will try.
<apritzel>
kmaincent: I think it will *not* work on the A64, though. The H616 explicitly mentions SPI NAND boot support, so this might be a feature of newer SoCs
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<kmaincent>
okay
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<karlp>
it _may_ just have been named expclicitly as spi nand has become more commonly used?
<apritzel>
karlp: yeah, we don't know for sure (hence my recommendation to try it)
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<prefixcactus>
apritzel: I noticed that gmac_rgmii_pins from sun8i-r40.dtsi does not match the fex file we got from Forlinx: the former does not include PA9 and PA14 while the latter does.
<prefixcactus>
Ethernet works either way, so I don't know how significant this is and what's the reason for the difference.
<apritzel>
prefixcactus: that is because they are not RGMII pins (GNULL), but used only for RMII
<prefixcactus>
ah.
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