<GitHub>
[artiq] StanleyEDavidsdavid30 commented on issue #683: Yes, I was able to run the led dot py successfully and can control the state of the LED by entering inputs to the artiq command line https://github.com/m-labs/artiq/issues/683#issuecomment-286307402
<GitHub>
[artiq] sbourdeauducq commented on issue #683: Yes. Which TTL pin are you using? If it's a bidirectional pin, you need to put it into output mode by calling ``output()`` followed by ``delay()``. Other than that, it's certainly an electrical or logic analyzer problem, check that you are connected to the right pin and try with a different measurement device (e.g. oscilloscope or even digital multimeter if you make the waveform slow enough). https://g
<sb0>
mithro, it is what is says it is. a tdc core. what exactly is your question?
<mithro>
What is a tdc core and what is it useful for?
<sb0>
whitequark, are you able to reproduce this in the gateware test bench?
<sb0>
mithro, something to timestamp digital signal. the popular application is laser range finders.
<whitequark>
sb0: reproduce what? the length issue? I couldn't reproduce it before
<whitequark>
but I'll try again
<sb0>
whitequark, so if you cannot reproduce it, things are (usually) working correctly after fixing the sdram word direction issue?
<whitequark>
sb0: no, I mean, it is an issue on FPGA
<whitequark>
but in the past, when I experimented with the testbench, both data length 1 and data length 4 worked
<sb0>
whitequark, what is the issue exactly?
<whitequark>
sb0: if I emit records with 4 data bytes (the rtio_output signature has an u32 in it), and correspondingly the total record size of 18, it seems that the core detects an end marker prematurely and stops
<whitequark>
if I emit records with 1 data byte and the total record size of 15, everything works as expected
<sb0>
ok
<sb0>
and when loading the problematic sdram words into the test bench, what happens?
<whitequark>
the testbench actually never emits records with leading 0's
<sb0>
yes, so make it do that
<whitequark>
the tests pass
<whitequark>
ah, hang on
<whitequark>
yes, I made the testbench emit the exact same sequence as I form on the FPGA, and tests pass