05:07 <GitHub> [artiq] dhslichter commented on issue #535: I agree with @jordens; the most important thing to do here would be to implement a "standard" hard FP instruction set. Basically the thing to do would be to implement all the instructions defined in the openrisc standard (ORFPX32) but not actually implemented in mor1kx. The sin/cos/log/exp functions could then be constructed from these with (hopefully) reasonable performance, and we can decide later if they

12:26 <larsc> I'm wondering from a power perspective what would be better in an FPGA, a long combinatorial chain or an equivalent circuit with pipelining registers

13:37 <rjo> larsc: assuming same overall throughput, length, routing, logic resources, and the two cases only differing in pipeline registers being bypassed or not, the pipelined version would be worse if a bypassed register uses less power than an in-use one.

13:38 <rjo> but other factors will probably be dominant in practice.

13:41 <larsc> but having the register will cause less glitching

13:42 <larsc> it will block the glitches from propagating until the output value has settled

13:42 <larsc> but does this offset the extra power consumtion by the FF?

13:57 <rjo> larsc: right. that will depend a lot on the logic graph.

13:58 <sb0> also, with a long comb graph, is it just glitches or do the gates also spend a longer time in intermediate voltages that cause more CMOS power dissipation?

15:59 <rjo> whitequark: https://internals.rust-lang.org/t/2016-rust-commercial-user-survey-results/4317 did we weigh in on that?

16:05 <whitequark> rjo: I don't think so

16:05 <whitequark> never heard of that survey

17:51 <GitHub> [artiq] r-srinivas commented on issue #432: What would happen if the previous experiment modifies a dataset that's called in the prepare of the subsequent experiment? That would mean it would get preloaded onto the kernel before that dataset was modified, right? https://github.com/m-labs/artiq/issues/432#issuecomment-287842632

22:32 <GitHub> [artiq] sbourdeauducq commented on issue #432: You could obtain such datasets via RPC from the kernel, which is faster than kernel compilation and loading. https://github.com/m-labs/artiq/issues/432#issuecomment-287918764