lekernel changed the topic of #milkymist to: Milkymist One, Migen, Milkymist SoC & Flickernoise :: Logs: http://en.qi-hardware.com/mmlogs :: EHSM Berlin Dec 28-30 http://ehsm.eu :: latest video http://www.youtube.com/playlist?list=PL181AAD8063FCC9DC
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<lekernel__> kristianpaul: yeah let's change the cr/lf, since you insist...
<kristianpaul> larsc: have a patch ! :-)
<kristianpaul> i insist a lot yup :-)
<lekernel__> kristianpaul: what feature do you need which is in legacy soc and not yet in ng?
<kristianpaul> cause my workaround was a ugly hack to flterm ;)
<kristianpaul> lekernel__: verilog code i can barely understand
<kristianpaul> i have programed little mcus in the past and i love the idea of the lm32 soc a simple one
<lekernel__> building small lm32 socs is possible with migen too...
<kristianpaul> so i dont see in my self and inmediate need to add more higher descriptions languages
<lekernel__> in fact you have more customization options
<kristianpaul> but that create overhead in other parts
<lekernel__> where?
<kristianpaul> machine generated verilog :-)
<lekernel__> is there any linux distro where python isn't installed by default?
<kristianpaul> i think thats not the point, but dunno it seems to be verywhere
<kristianpaul> point is
<kristianpaul> i dont came here for the memory controller
<lekernel__> the only extra package is networkx, which you only need for dataflow - and I'm thinking about discontinuing its use
<kristianpaul> or the effects
<kristianpaul> well those are interesting
<kristianpaul> i came here for the soc
<kristianpaul> the basis
<kristianpaul> so the lm32 soc you put together (including the CSR) was fine to me
<lekernel__> well, migen fhdl actually cleans up several verilog idiosyncrasies and gotchas
<lekernel__> even if the syntax is a bit ugly at times
<kristianpaul> thats what i have with legacy soc and i dont see the inmediate need to move to -ng (no saying it have interesting features to play)
<kristianpaul> yeah fhdl is nice, i mean try not use verilog it is
<kristianpaul> i remenber you even wrote some intermediate llhdl etc..
<lekernel__> nah, nothing to do
<kristianpaul> but i will like to keep close to the hw
<lekernel__> fhdl -> verilog is direct
<kristianpaul> the closest now is simple verilog
<lekernel__> fhdl only adds one abstraction that verilog does not: implied clock and reset
<kristianpaul> not saying lm32 inside is not that simple, i havent checked
<kristianpaul> and of course wspraul fgpa tools but thats foorplaning for now
<lekernel__> all the rest is already implemented in verilog, but implemented poorly sometimes (eg signed arithmetic)
<kristianpaul> still interesting because is simple
<lekernel__> or reg vs. wire. this one is a complete waste of time.
<kristianpaul> he eyah
<kristianpaul> i hope you do understand my point
<kristianpaul> i have nothing against -ng
<kristianpaul> is cool
<kristianpaul> but i dont think i need it
<lekernel__> so if you use FHDL you only have a Signal() object, and then the verilog converter will appropriately choose "reg" or "wire" for you
<kristianpaul> yes yes
<lekernel__> and regarding hardware closeness, you can directly access the FPGA LUTs and other primitives from FHDL just as well
<kristianpaul> yes sure
<kristianpaul> i like you lm32 soc a lot
<kristianpaul> thats why i sent the patch for adding one bit more to CSR
<kristianpaul> i like mcus flat memory etc..
<lekernel__> ng also has flat memory
<kristianpaul> i dont think i need more features now
<kristianpaul> yeap
<kristianpaul> but i want a verilog code i can barely understand
<kristianpaul> even tought xilinx tools mess and "optimize" and you look at the resulting netlist is something may be no be easy to observe
<kristianpaul> for a human ;)
<kristianpaul> but still the closest to fpga hw resources i think
<kristianpaul> so is not a feature thing
<kristianpaul> is a simplicity
<kristianpaul> small tools
<kristianpaul> etc
<kristianpaul> i ejoy a lot when wpwrak wrotes its own small tools
<kristianpaul> for small and fefined porpuses
<kristianpaul> i like a soc like that
<kristianpaul> not a new HDL
<kristianpaul> thats something TBD... once more people code for fpga configurations bits then selfs etc..
<kristianpaul> okay need to go visit granmother :_)
<kristianpaul> nice talk to you and thanks for the cf reconsiderations !
<lekernel__> well, fhdl is arguably simpler than verilog
<kristianpaul> ah
<lekernel__> and migen is merely a collection of small tools
<kristianpaul> fhdl can generate and intermediate language to xilinx tools?
<kristianpaul> i mean not verilog
<lekernel__> fhdl and verilog are about at the same abstraction layer...
<kristianpaul> but you generate verilog at the end no?
<lekernel__> I convert to verilog merely for practical considerations
<lekernel__> you could certainly remove it and do some fhdl -> synthesizer IR or fhdl -> netlist directly
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<kristianpaul> this is your fhdl http://cs.ecs.baylor.edu/~maurer/help/fhdlsyn/ ?
<kristianpaul> remove, yeah thats my feature ;-)
<lekernel__> but then you have no simulator, are bound to a particular fpga family, etc.
<lekernel__> ie it's a royal pain and generating verilog is a much better solution
<lekernel__> no
<kristianpaul> ah no no reading fpgaworls slides yes i remenber now
<kristianpaul> need to go..
<kristianpaul> bye
<lekernel__> bye!
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<wpwrak> lekernel__: jlime for the ben doesn't have python by default (nor perl for that matter)
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<lkcl_> hi folks - does anyone have a mmone JTAG daughterboard made up, that i can either borrow or buy? as long as it's standard JTAG that is :)
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<lekernel__> wpwrak: are you serious about running fpga synthesis on the ben? :)
<lekernel__> lkcl_: where do you live?
<lekernel__> wpwrak: though maybe wolfspraul's tools could handle small designs there... if the chip model fits in the RAM
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<lkcl_> lekernel__: i'm in the UK. i'm debugging the 1st revision of the A10 EOMA68 CPU Card, i need a JTAG board, and i'd rather work with people who are in the free software community
<Fallenou> is there really a Linux syscall to flush data or instruction cache ?
<Fallenou> I'm not sure a userland application should have access to such low level stuff like "flush caches"
<Fallenou> a syscall access to DCC ICC seems reasonable though
<Fallenou> if such a syscall already exist in Linux I can see no point in not implementing it
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<Fallenou> mwalle: what's the difference between your mmu and mmu-cleanup branch ?
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<roh> lkcl_: i recommend anything similar to the moko develboard or the amontec ones
<roh> atleast for arm based stuff.. works great with openocd
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<roh> lkcl_: maybe send this guy a nice mail: http://pulster.de/d__omdebug__OpenMoko_Debug_Board___GRATIS__985.htm
<roh> he sells openmoko phones and sends out the debug boards for free with his moko orders on request
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<wpwrak> lekernel__: (synthesis) dunno :) just commented on your question whether there was any distribution that had no python by default
<wpwrak> and i would indeed hope that more efficient synthesis tools would eventually result from wolfgang's effort. the incredible slowness of the closed tools is plain incomprehensible and an insult to human ingenuity
<wpwrak> Fallenou: i'm not aware of any such syscalls. a syscall would seem somewhat heavy for this kind of tasks anyway.
<Fallenou> wpwrak: ok, what would you think about allowing a user land application to play with ICC and DCC? It seems odd to me
<Fallenou> user land should never have access to very low level stuff
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<wpwrak> there may be some use for being able to flush caches, e.g., to implement fast user-space interprocess communication
<wpwrak> not sure how far other architectures let you go there
<wpwrak> in general, flushing your caches should be a relatively harmless operation, considering that you could obtain the same effect by other means as well
<Fallenou> yes
<mwalle> Fallenou: mh the mmu-cleanup branch are cleanuped patches for milkymist
<Fallenou> so the most up to date tree with all features and work in progress is "mmu" ?
<mwalle> but i'm working on a lm32 module, i hope lekernel__ can be convinced to include the processor as a submodule
<mwalle> Fallenou: the diff should be minimal, there are some additional cleanups on the mmu-cleanup branch, but there are more cleanups on the lm32 repo (not released yet)
<Fallenou> I think if you submit a patch that makes the makefile do the git submodule update --init stuff etc automatically he would agree ;)
<mwalle> but the mmu stuff is the same on mmu-cleanup and the upcoming lm32 module
<Fallenou> ok
<Fallenou> I will very soon try to catch up with what you've done recently
<mwalle> the mmu branch is better for reading the history :)
<Fallenou> ok great :)
<mwalle> ah and i found a bug in the qemu lm32 emulation code :)
<Fallenou> ohoh
<Fallenou> it was hiding deeply in qemu codebase
<Fallenou> nice
<mwalle> cmpgeiu and cmpgiu may give the wrong result
<mwalle> importing the qemu tests in the lm32 test bench worked surprisingly well ;)
<Fallenou> :)
<Fallenou> going to bed, gn8!
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