<mwalle>
i have a question regarding handle_level_irq, maybe you can help me :)
<mwalle>
the sequence is "irq -> mask_ack -> isr -> unmask" right?
<larsc>
yes
<mwalle>
but for level sensitive irqs the mask_ack is only a mask, isn't it? because the isr hasn't reset the device interrupt output, the interrupt is still asserted, and the pending status won't be cleared with an ack
<larsc>
sort of
<larsc>
handle_level_irq is kind of a misnomer anyway
<mwalle>
because?
<larsc>
i actually made a drawing explaining the difference between handle_level_irq and handle_edge_irq, let me find it
<mwalle>
k
<mwalle>
i had a look at the lm32 port, where we use the handle_level_irq. i don't know why this is working with level-sensitive interrupts (iirc the minimac2 has level-sensitive ones)
<mwalle>
shouldn't be the sequence "irq -> mask -> isr -> ack & unmask" ?
<larsc>
the first should be handled by handle_edge_irq the second by handle_level_irq
<larsc>
although the second can also be triggered by edge irqs
<larsc>
yea, exactly, with the current sequence the interrupts are actually triggered twice
<larsc>
actually I got it slightly wrong. So the first one in the picutre is the hardware which works with handle_level_irq and handle_edge_irq for level and edge irqs
<larsc>
the second one works with edge triggered irqs when using handle_level_irq
<larsc>
for a level sensitive irq you acutally need some kind of translation hardware which turns the level irq into a edge irq
<larsc>
if you want to use handel_level_irq
<larsc>
otherwise you'll see the irq twice
<mwalle>
ok makes sense
<mwalle>
btw i had the same thought on the pending and the mask register
<mwalle>
(where the bitwise and is located, before or after the pending register)
<mwalle>
but then, why hadn't we seen some spurious interrupts? (assuming the driver ISR correctly returns IRQ_HANDLED and IRQ_NONE
<larsc>
do we ever return IRQ_NONE?
<mwalle>
no ;)
<mwalle>
ok, that explains a lot
<mwalle>
larsc: thanks for the chat :)
<mwalle>
mh one more, so the solution is to use handle_simple_irq and use mask/generic_handle_irq/ack/unmask ?
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<larsc>
I don't know. The pending register is kind of annoying, if the irq lines are really level triggered it makes much more sense to just route them through
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<larsc>
(as long as the design is synchronous)
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<mwalle>
larsc: for lm32 lekernel__ already eliminated the IP register
<larsc>
so we are good?
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<lkcl_>
roh, lekernel__ - thank you for the suggestion to contact that guy about the openmoko debug board
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